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led1
说明: 点亮led流水灯,通过调用锁相环,可以更改对应的时钟。(Lighting the LED pipelining lamp, the corresponding clock can be changed by calling the phase-locked loop.)
- 2020-06-16 07:00:01下载
- 积分:1
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beipin_test
实现任意倍数的倍频,帮助大家解决VHDL倍频问题,(The realization of arbitrary multiples of the octave, octave VHDL help people solve problems,)
- 2021-03-24 17:19:14下载
- 积分:1
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VHDL硬件描述语言与数字逻辑电路设计――
VHDL语言的基本知识和设计逻辑电路的基本方法及NAX的使用...
VHDL硬件描述语言与数字逻辑电路设计――
VHDL语言的基本知识和设计逻辑电路的基本方法及NAX的使用-VHDL hardware description language and digital logic circuit design
- 2022-08-23 07:30:13下载
- 积分:1
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hilbert_transformer.tar
hilbert 变换的vhdl源代码,来源于网上,本人也做过简单的8抽头的,但这个的算法还没搞懂,希望懂行的下载了研究一下,给个中文的简单的说明!(hilbert transform VHDL source code from the Internet, I have been a simple 8-tap, but even before they get to know this algorithm, I hope knowledgeable downloaded to look for a simple description of the Chinese!)
- 2020-10-19 21:37:25下载
- 积分:1
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AMBA APB桥VHDL
这是一个AMBA APB桥实现VHDL。这包括主人,奴隶和试验台试验桥。我已经测试功能。
- 2022-06-02 20:02:44下载
- 积分:1
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Add_sub_struc
8位加减器,八位减法器与加法器,用过一个控制端可以自由变换,采用移位加法方式,用途广泛,利用减法位补码加法的理论实现。(8 addition and subtraction, eight subtractor and adder, used a control terminal can freely change the using Shift addition, a wide range of uses, the use of subtraction complement addition theory to achieve.)
- 2012-05-14 20:36:26下载
- 积分:1
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FPGA驱动VGA接口显示字符
FPGA驱动VGA接口显示字符 -FPGA-driven interface VGA display characters
- 2022-08-21 10:55:12下载
- 积分:1
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The use of Altera' s FPGA
使用Altera公司的FPGA进行VHDL开发。使用quartus2 9.0软件在EP1C3T144C8开发板上实现对4x4键盘的输入控制,并显示在一个8段式数码管上。-The use of Altera" s FPGA-VHDL development. Use quartus2 9.0 software EP1C3T144C8 the development board to realize 4x4 keyboard input control, and displayed in an eight-stage digital pipe.
- 2022-09-23 11:15:03下载
- 积分:1
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NAND flash实现ECC
详细说明:基于xilinx ISE环境开发的VHDL的NAND flash ECC 实现,eccGen256Byte 文件夹为ECC 产生程序,EccErrLoc文件夹为ECC错误定位程序。
- 2023-02-03 19:50:04下载
- 积分:1
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RANGEN
2011年全国大学生电子设计竞赛E题“简易数字信号传输性能分析仪”fpga的控制代码,verilog编写;包括了M序列及同步时钟的提取等所有程序。(2011 National Undergraduate Electronic Design Contest E title "Simple digital signal transmission performance analyzer" fpga control code, verilog prepared including the M-sequence and synchronous clock extraction and all other programs.)
- 2020-10-27 17:09:59下载
- 积分:1