-
VHDL_i2cs_rx_CPLD
CPLD imlementation of I2C BUS Controller.
The description has been made by VHDL
- 2012-08-20 14:30:18下载
- 积分:1
-
VHDL_to_UART
用VHDL编写的串口通讯程序,包括几个不同的程序例子,也可以用verilog进行改写。()
- 2007-08-09 09:54:40下载
- 积分:1
-
SOPC软件编程基础,用实例讲解,非常适合初学者。
SOPC软件编程基础,用实例讲解,非常适合初学者。-SOPC software programming foundation, using examples to explain, very suitable for beginners.
- 2022-09-22 10:45:04下载
- 积分:1
-
RAD4FFTaRAD4iFFT
基4的FFT正变换和反变换程序,速度特快,使用方法简单且在程序注解中标注。带有测试程序,且在多个项目中应用,正确性毋容置疑。(Rad4FFT 和 Rad4iFFT)
- 2020-12-19 12:19:10下载
- 积分:1
-
HOWTO_-Get-Configuration-and-Location-Information
this document used for how to get config and location information of PCI card
- 2012-07-21 12:26:16下载
- 积分:1
-
一个交通灯的vhdl语言实现 用 VC的 1.在指定的文件夹内查找某个文件 2.获取系统文件夹的路径, 要求显示windows system tem...
一个交通灯的vhdl语言实现 用 VC的 1.在指定的文件夹内查找某个文件 2.获取系统文件夹的路径, 要求显示windows system temp 当前目录的路径 C语言 跳马问题:在5*5的棋盘上,以编号为1的点出发,按日只跳马,要求不重复地跳所有位置,求出符合规则所有跳马的方案 1 6 15 10 21 14 9 20 5 16 19 2 7 22 11 8 13 24 17 4 25 18 3 12 23 -a traffic light VHDL language of a VC. The designated folders to search within a document 2. Access to the system folder path, requested that the current windows system temp directory path C language vault : 5* 5 in the chessboard to the No. 1 starting point, the only daily vault and asked not to repeat all locations to jump to get in line with all rules of the program vault 1 6 15 10 21 14 9 20 5 16 19 2 7 22 11 8 13 24 17 4 25 18 3 12 23
- 2022-02-14 11:48:06下载
- 积分:1
-
Cordic_matlab
实现自然对数运算的cordic算法的matlab浮点仿真,以及针对FPGA硬件平台的定点仿真测试(Achieve natural logarithm of cordic algorithm matlab floating point emulation, and FPGA hardware platform for fixed-point simulation testing)
- 2013-11-01 15:10:09下载
- 积分:1
-
I2C
说明: 一种能简单的实现I2C通讯的代码,对于主机和从机之间的通讯讲解的很清楚。(A Code for I2C Communication)
- 2020-06-18 23:20:02下载
- 积分:1
-
this project is based on 2*1 and 4*1 multiplexer and 1*2 and 1*4 demultiplexer u...
this project is based on 2*1 and 4*1 multiplexer and 1*2 and 1*4 demultiplexer using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering.
Here dataflow techniques and behavioural
-this project is based on 2*1 and 4*1 multiplexer and 1*2 and 1*4 demultiplexer using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering.
Here dataflow techniques and behavioural
- 2022-05-22 09:03:05下载
- 积分:1
-
SoC-Design-DDR3-Controller-master
说明: 难得的soc设计用的ddr3 verilog,可用于学习!!!!!有datasheet ,可仿真(soc ddr3 verilog for study !!)
- 2020-06-22 17:07:57下载
- 积分:1