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通过vhdl实现ls138硬件功能 通过vhdl实现ls138硬件功能
通过vhdl实现ls138硬件功能 通过vhdl实现ls138硬件功能 -the description of ls138 in vhdl
- 2022-07-14 19:56:28下载
- 积分:1
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generateCAcode
gps C/A码生成
生成gps32颗卫星伪码,方便,经过测试(gps C/A code generation to generate pseudo-code satellites gps32, convenient and tested)
- 2021-05-13 04:30:02下载
- 积分:1
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vbyuanma
示波器的源码,基于串行口的,(oscilloscope source code, based on the serial port,)
- 2007-04-18 19:11:22下载
- 积分:1
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xilinx simulator programme of serial port
xilinx的串口仿真程序-xilinx simulator programme of serial port
- 2022-11-08 03:05:05下载
- 积分:1
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第七次课--视频图像DCT处理及水印嵌入_2
说明: 熟悉IIC协议总线协议,采用IIC总线对图像采集传感器寄存器进行配置,并转换为RGB565格式。
利用异步FIFO完成从摄像头输出端到SDRAM 和SDRAM 到VGA 接口各跨时钟域信号的传输和处理。
利用 SDRAM 接口模块的设计,实现了刷新、读写等操作;为提高SDRAM 的读写带宽,均采用突发连续读写数据方式;并采用乒乓操作实现 CMOS 摄像头与VGA的帧率匹配。
利用双线性插值方法实现对图像640×480到1024×768的放大操作。
完成VGA显示接口设计。(Familiar with IIC protocol bus protocol, IIC bus is used to configure the register of image acquisition sensor and convert it into RGB565 format.
Asynchronous FIFO is used to transmit and process signals across clock domain from camera output to SDRAM and SDRAM to VGA interface.
With the design of SDRAM interface module, refresh, read and write operations are realized. In order to improve the read and write bandwidth of SDRAM, burst continuous read and write data mode is adopted, and table tennis operation is used to achieve frame rate matching between CMOS camera and VGA.
The bilinear interpolation method is used to enlarge the image from 640*480 to 1024*768.
Complete the VGA display interface design.)
- 2020-06-25 04:00:02下载
- 积分:1
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这是介绍嵌入式开发相关的资料。有总线与内存的操作
这是介绍嵌入式开发相关的资料。有总线与内存的操作-introduced Embedded Development relevant information. Bus and a memory operation
- 2023-09-02 05:05:15下载
- 积分:1
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非常优秀的国外VHDL设计教程,可进行MODELSIM模拟等操作
非常优秀的国外VHDL设计教程,可进行MODELSIM模拟等操作-Excellent foreign VHDL design tutorial, it can conduct operations such as ModelSim Simulation
- 2023-05-15 08:55:03下载
- 积分:1
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VerilogHdlPracticeAndSystemDesign
本RAR包括《Verilog-HDL实践与应用系统设计》一书中的全部例子,这些例子全部通过了验证。第七章以后的设计实例,不仅有Verilog-HDL的例子,也附了包括VB、VC++等源程序,甚至将DLL的生成方法也详尽地作了说明。(The RAR includes " Verilog-HDL Practice and Application of system design," a book full of examples, all passed validation. Chapter VII of the future design examples, not only examples of Verilog-HDL, but also attached, including VB, VC++ source code, etc., and even DLL generation methods explained in detail.)
- 2009-11-10 19:40:12下载
- 积分:1
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crc16_8bit.v
FPGA用于实现crc16编码的verlog源程序,用到的请下载。(FPGA is used to achieve the the crc16 the encoding of verlog source code used to download.)
- 2012-11-08 13:45:14下载
- 积分:1
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8*8键盘矩阵 用作单片机 8*8键盘矩阵 用作单片机 8*8键盘矩阵 用作单片机...
8*8键盘矩阵 用作单片机 8*8键盘矩阵 用作单片机 8*8键盘矩阵 用作单片机-8* 8 keyboard matrix used as a microcontroller 8* 8 keyboard matrix used as a microcontroller 8* 8 keyboard matrix used as a microcontroller 8* 8 keyboard matrix used as a MCU
- 2022-02-28 23:49:24下载
- 积分:1