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8位十进制频率计,通过验证,目标芯片EPF10KLC84
8位十进制频率计,通过验证,目标芯片EPF10KLC84-4-8 decimal Cymometer through authentication, the target chip EPF10KLC84-4
- 2022-07-15 16:44:52下载
- 积分:1
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Can be directly downloaded to the chip used in the complete UART with FIFO proce...
可以直接下载到芯片用的带有FIFO的完全UART程序,vhdl语言编写。-Can be directly downloaded to the chip used in the complete UART with FIFO procedures, vhdl language.
- 2022-05-23 23:16:30下载
- 积分:1
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verilog-ethernet
说明: Collection of Ethernet-related components for gigabit, 10G, and 25G packet processing (8 bit and 64 bit datapaths). Includes modules for handling Ethernet frames as well as IP, UDP, and ARP and the components for constructing a complete UDP/IP stack. Includes MAC modules for gigabit and 10G/25G, a 10G/25G PCS/PMA PHY module, and a 10G/25G combination MAC/PCS/PMA module. Includes various PTP related components for implementing systems that require precise time synchronization. Also includes full MyHDL testbench with intelligent bus cosimulation endpoints.
- 2021-04-17 23:38:52下载
- 积分:1
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用Bresenham算法在FPGA上实现小数分频器,verilog编写,计算机图形法...
用Bresenham算法在FPGA上实现小数分频器,verilog编写,计算机图形法-Bresenham algorithm used in the FPGA to achieve a small number of crossovers, verilog preparation, computer graphics method
- 2022-03-11 03:26:38下载
- 积分:1
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Waveform-generation-program
基于VHDL语言的波形发生器编程设计,能够实现常用波形的产生。(Waveform generator design based on VHDL programming, to achieve common waveform generated.)
- 2014-05-05 16:50:23下载
- 积分:1
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用VHDL硬件描述语言实现的对FPGA(Cyclone II)的配置的VHDL源代码。...
用VHDL硬件描述语言实现的对FPGA(Cyclone II)的配置的VHDL源代码。-VHDL hardware description language for FPGA (Cyclone II) configurations VHDL source code.
- 2022-07-11 15:27:50下载
- 积分:1
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RS232 communication protocol with the VHDL language, based on the Altium Designe...
此RS232通信协议用VHDL语言实现,基于Altium Designer公司的Protel DXP开发平台。本人是基于Nanaboard开发板编写的程序,其他用户只需要对配置文件进行修改即可用于其他电路板。-RS232 communication protocol with the VHDL language, based on the Altium Designer
- 2023-01-28 04:55:04下载
- 积分:1
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library
Library OLED SSD1305
- 2012-11-01 21:21:26下载
- 积分:1
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TheResearchAndIPDesignOfSMBusBasedSmartBattery
本文研究了SMBus
规范,介绍了典型的基于片上系统(SoC)设计的知识产权核(IP)实现,采用自顶向下
(Top-down)的集成电路设计方法完成了设计,并架构了基于总线功能模型(BFM)的验证平台
完成功能仿真,顺利完成了逻辑综合和时序仿真。FPGA 验证和投片后测试均表明设计具有
良好的性能。(This paper studies the SMBus specification, based on the introduction of the typical system-on-chip (SoC) intellectual property core design (IP) implementation, using top-down (Top-down) of the integrated circuit design methods achieve a design and architecture based on the total Line functional model (BFM) achieve functional verification platform for simulation, successfully completed a logic synthesis and timing simulation. FPGA silicon validation and post-tests show that the design has good performance.)
- 2009-03-26 12:16:53下载
- 积分:1
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Using FPGA to achieve the VGA/LCD display relevant knowledge, including the proc...
用FPGA实现的VGA/LCD显示的相关知识,包含了程序的主要结构和主要功能模块的实现过程-Using FPGA to achieve the VGA/LCD display relevant knowledge, including the procedures for the main structure and main function modules of the realization process
- 2022-03-30 17:25:10下载
- 积分:1