M4A564/32 CPLD VHDLＡ程序，调试可用,51扩展.

bch encoder+decoder 源代码，Flash控制器，通讯都需要用到哦-bch encoder+ decoder source code, Flash controller, communications are needed Oh

dct实现verilog hdl的数字图像处理，源代码(dct achieve verilog hdl digital image processing, source code)

Designing Digital Down Conversion Systems with Altera CIC MegaCore and FIR Compensation Filter v6.1

语音采集,直接在QUARTUSII中打开调试.-err

design and implement a digital system on the Altera NIOS board which will read an analogue input using MicroChip’s SPI MCP3202 12-Bit A/D converter. The 8 most significant bits of the converted data will be displayed on two seven segments of the NIOS development board. The sampling frequency is 20kHZ. Use a potentiometer.(design and implement a digital system on the Altera NIOS board which will read an analogue input using MicroChip' s SPI MCP3202 12-Bit A/D converter. The 8 most significant bits of the converted data will be displayed on two seven segments of the NIOS development board . The sampling frequency is 20kHZ. Use a potentiometer.)

将BT656数据流转换成RGB图像格式的数据(Converting BT656 data stream into RGB image format)

华为经典设计全套入门技巧，面试经验，设计技巧(Huawei Classic Design Complete Introduction Skills, Interview Experience, Design Skills)

是基于FPGA的5620的数模转换芯片底层的应用程序，希望有用。(Is a digital-analog converter chip underlying the 5620 FPGA-based applications, and I hope useful.)

正弦波电流驱动的无刷直流电机性能分析，通过分析方波电流驱动与正弦波电流比较，得出正弦波电流驱动电机性能较好(Sine wave current drive brushless DC motor performance analysis, by analyzing the square-wave current drive with sine wave current comparison, the sine-wave current drive motor performance is better)

用VHDL语言编写的实现8位数据的并串转换，可下载在FPGA中-VHDL language with the realization of an 8-bit data, and the string conversion, can be downloaded in the FPGA in