登录
首页 » VHDL » ModelSim waveform can be compared to the current functional simulation with a re...

ModelSim waveform can be compared to the current functional simulation with a re...

于 2023-05-21 发布 文件大小:3.71 kB
0 148
下载积分: 2 下载次数: 1

代码说明:

ModelSim的波形比较的功能可以将当前仿真与一个参考数据(WLF文件)进行比较,比较的结果可以在波形窗口或者列表窗口中查看,也可以将比较的结果生成一个文本文件-ModelSim waveform can be compared to the current functional simulation with a reference (WLF paper ), the results can be compared in the waveform window or window List View, it will also compare the results generate a text file

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • 8.8-URAT-VHDL
    URAT VHDL程序与仿真 URAT the VHDL program and Simulation (URAT the VHDL program and Simulation )
    2012-04-09 20:53:45下载
    积分:1
  • 9850sin_function
    ad9850函数发生器 MSP430单片机驱动程序 扫频 DDS(AD9850 DDS)
    2013-08-27 15:13:29下载
    积分:1
  • ass1_3_safe
    The objective of this project is to design and implement the controller for an electronic safe. You will interface a 16-button keypad to the NIOS boards. The combination code of the safe will be the last
    2011-03-05 01:17:22下载
    积分:1
  • 123456shouhuoji
    售货机-VHDL语言-已调试通过 真的很好用哦~适合一切学习EDA的初学者,能够让你轻松度过EDA课!~(Vending machine-VHDL language- has been really good with debugging by Oh ~ EDA for all beginners to learn, to let you easily through the EDA class! ~)
    2010-05-09 22:31:14下载
    积分:1
  • JOP内核字节码获取,很难找的东东,呕血之作
    JOP内核字节码获取,很难找的东东,呕血之作-JOP core byte code access, it is difficult to find the price. Zhi for hematemesis
    2023-01-27 11:00:03下载
    积分:1
  • 此设计采用Verilog HDL硬件语言设计,在掌宇开发板上实现. 将整个电路分为两个子模块,一个提供同步信号(H_SYNC和V_SYNC)及像素位置信息;...
    此设计采用Verilog HDL硬件语言设计,在掌宇开发板上实现. 将整个电路分为两个子模块,一个提供同步信号(H_SYNC和V_SYNC)及像素位置信息;另一个接收像素位置信息,并输出颜色信号。这样便于进行图形修改,同时也容易实现- This design uses Verilog the HDL hardware language design, realizes on the palm space development board Divides into two stature modules the entire electric circuit, provides the synchronized signal (H_SYNC and V_SYNC) and the picture element positional information; Another receive picture element positional information, and output color signal. Like this is advantageous for carries on the graph to revise, simultaneously is also easy to realize
    2022-04-07 13:58:38下载
    积分:1
  • 大名鼎鼎的Synopsys公司出的8051IP Core VHDL语言编写,能被keilC51支持...
    大名鼎鼎的Synopsys公司出的8051IP Core VHDL语言编写,能被keilC51支持-famous Synopsys Core 8051IP the VHDL language, can be supported keilC51
    2022-11-25 02:20:03下载
    积分:1
  • DS18B20LCD
    DS18B20温度测量程序 之后用于在LCD显示屏上显示对应的温度(DS18B20 test code)
    2011-08-30 12:59:20下载
    积分:1
  • PPM解码器
    本代码主要功能是PPM解码,采用Verilog语言,通过移位寄存器和组合电路实现解码。(The main function of this code is PPM decoding.)
    2020-12-10 18:29:19下载
    积分:1
  • SV-Combinational-Logic
    system Verilog combinational logic
    2017-01-24 18:50:29下载
    积分:1
  • 696516资源总数
  • 106914会员总数
  • 0今日下载