FFT的VHDL源代码

fifo程序代码，程序编写，测试仿真图形，方便，比较实用(fifo code, programming, testing, simulation graphics, convenient and more practical)

this a fpga sparttan 3e based project in which i have made a game based on vga interface . this file is the main file included in the project.-this is a fpga sparttan 3e based project in which i have made a game based on vga interface . this file is the main file included in the project.

This tutorial introduce VHDL code for clock pulse and 4-bit counter. With four bits, the counter count from 0 to 15. The timing of the counter is controlled by a clock signal. There will be a clear signal which can reset the counter value.

this program does something im not sure what but all i want is to get into the damn site thank you

经典的OV5642的verilog驱动程序(Verilog Driver of Classic OV5642)

基于VHDL的testbench编写攻略(VHDL based on the preparation of testbench Raiders)

采用骏龙科技这个13.1新版本破解器.对于已经用了老版本破解器的网友，请把bin和bin64下的sys_cpt.dll删除，然后把sys_cpt.dll.bak名字改成sys_cpt.dll，也就是先恢复正版，然后用这个破解器破解。注意老的license文件也要删除，改用这个新版本破解器附带的license(Cytech Technology 13.1 using the new version of this cracker. Has been used for the old version cracker users, please sys_cpt.dll bin and bin64 under Delete, and then changed the name of the sys_cpt.dll.bak sys_cpt.dll, which is first restore genuine, then use this cracker to crack. Note that the old license file should be deleted in favor of this new version of the license that came with crack)

说明：  可以实现2PSK的信号调制，已经过Modelsim波形仿真(It can realize 2PSK signal modulation and has been simulated by Modelsim waveform.)

用verilog状态机实现的自动售货机，是一次课程作业，参考了网上的例子进行了修改(Automatic vending machine implemented with Verilog state machine)

actel公司用于1553总线的1553BRT-EBR核心代码 包括文档和代码非常有用(Actel company for the 1553 bus 1553BRT-EBR core code, including documentation and code is very useful)