运用vhdl程序设计语言进行ppm设计，ppm 设计在vhdl语言中非常常用，运用已经越来越广泛。...

这个是永磁无刷直流电机的本体结构和控制电路的联合仿真，既可以设计电机的结构，又可以搭电机的控制系统。(This is the body structure of the permanent magnet brushless DC motor and control circuit co-simulation, both the structure of the motor can be designed, they can take control of the motor system.)

用AHDL语言编写,MAXPULS开发.通信不受外部时钟速率和数据字节数目限制.-with AHDL prepared MAXPULS development. Communications from external clock rate and restriction on the number of data bytes.

说明：  Protel中VHDL设计参考,pdf,不错的一本学习VHDL的书(Protel design in VHDL)

本程序是用vhdl开发的实现并串转换功能的程序。(This procedure is developed using VHDL implementation and string conversion function of the program.)

68013与FPGA的通信，包含了固件程序与verilog程序(68013 and FPGA communication, including firmware and verilog program)

一款verilog设计的SRAM控制器，可以实现AHB总线控制的功能。(abcdefghijklmnopqrstuvwxyz)

rsc递归卷积编码器是turbo码的分量编码器，递归相对于普通的卷积码多了一个反馈，拥有更好地重量谱分布和更加的误码率特性，且码率越高，信噪比越低其优势越明显。利用D触发器组成的rsc生成器，逻辑思维简单，里面包含有测试波形以及测试的结果

switching the lights debouncing , toggle

基于FPGA的等精度数字频率计，包含FPGA和单片机通信程序，解释非常详细。经过调试成功。(FPGA-based Precision Digital frequency meter, including FPGA and MCU communication program, explained in great detail. After successful commissioning.)

FFT快速傅立叶变换-verilog，基于verilog的FFT源码，QuartusII上仿真通过(FFT Fast Fourier Transform-verilog, the FFT-based verilog source, QuartusII through the simulation)