运用vhdl程序设计语言进行ppm设计，ppm 设计在vhdl语言中非常常用，运用已经越来越广泛。...

一种学习用的小程序，主要用与VHDL仿真的全加器的一段代码！大家可以下载进行修改于仿写-A learning to use a small program, mainly used with the VHDL simulation of a full-adder code! You can download the modified Yu Fang Xie

ALTERA FPGA CLPD

有关gal器件的编程入门，以及常见逻辑门、计数器VHDL程序(For gal device programming entry, as well as common logic gates, counters VHDL program)

it is a new describng system for it field

说明：  基于FPGA的信号发生器，产生了正弦波，方波，锯齿波和三角波四种波形，按下一次按钮，波形切换一次。按下另一个按钮，改变波形的频率(The signal generator based on FPGA can generate four kinds of waveforms: sine wave, square wave, sawtooth wave and triangle wave. Press the button once and switch the waveform once. Press another button to change the frequency of the waveform)

布尔乘法器带testbench好用的工程啊(Boolean multiplier works with testbench nice ah)

利用Cadence Allegro PCB SI进行SI仿真分析(Performed using the Cadence Allegro PCB SI SI simulation analysis)

acousting fingerprint enhancement

本代码是用VERILOG语言描述的AMI码的解码的程序，经过调试是正确的。代码简单易懂。(This code is described in VERILOG language AMI code decoding process, after debugging is correct. Code is easy to understand.)

篮球24s计时。计时器递减计数到零时，数码显示器显示‘0’并停止，同时发出报警信号(basketball 24 seconds)