运用vhdl程序设计语言进行ppm设计，ppm 设计在vhdl语言中非常常用，运用已经越来越广泛。...

说明：  由忆阻器机制设计蕴含逻辑，内含testbench仿真文件(Design implied logic by memristor mechanism, including testbench simulation file)

Program to implement convolution through VHDL-Program to implement convolution through VHDL...

说明：  quartus的破解软件，里面有说明文档(Quartus crack software, which contains documentation.)

verilog hdl 编写的64点fft代码，适合很多芯片(coded by verilog hdl that implement 64 point fft, suite to many core)

TD-LTE中（3.1.7）咬尾卷积码编码器verilog代码(Tail-biting convolutional code encoder verilog code)

这个课程设计的题目是模拟电压采集电路路与程序设计,报告书的内容都比较详细. (The topics of this course design is an analog voltage acquisition circuit Road and program design, the contents of the report are more detailed.)

说明：  ask psk 编码调制的vhdl 实现(ask psk coded modulation to achieve the VHDL)

verilog 模糊PID 通过修改MIF文件 可以完成单个参数整定(FUZZY pid by verilog HDL)

1024点fft verilog hdl-1024-point fft verilog hdl

三十个vhdl源码，对于刚开始学习vhdl的很有帮助，可以帮助理解数字电路-30 vhdl source for the beginning of the study vhdl helpful, and can help to understand digital circuit