简易cpu的设计

一款8位Turbo-51的CPU软核的设计-An 8 Turbo-51" s soft-core CPU design ....

micron公司提供的控制器，很具有参考性质，用flash的童鞋可以下载参考，含有ECC功能

基于Max+Plus II和VHDL的电子密码锁设计(Based on Max+ Plus II electronic lock and VHDL design)

AD7606采集代码，用于verilog 驱动 AD7606 adc SPI 串口方式(AD7606 acquisition code, used for Verilog drive AD7606 ADC SPI serial mode)

this file describes the steps in building a fifo buffer module in verilog hdl and programming them on an fpga device

模拟示波器的现实程序，有x，y和光标。采用AD5440输出，现实效果很好。（示波器x-y方式）(Analog oscilloscope reality program, there are x, y and cursor. Using AD5440 output, real good results. (Xy oscilloscope mode))

led 点阵显示led――rom实现，功能模块分离 就爱可根据卡加大公开吉安市贷款给经济 -led dot matrix display led-- rom realized, functional modules can be separated on the basis love Cagayan open to the public Ji"an City loans to the economy

Simulation and Synthesis Techniques for Asynchronous FIFO Design

说明：  实现AXI,AXI-Lite乒乓地址的传输，AXI,AXI-Lite已经封装成内核，可直接修改后使用(Realize the transmission of table tennis address of Axi and Axi Lite. Axi and Axi Lite have been encapsulated into a kernel, which can be directly modified and used)

MODELSIM的实验程序，在QUARTUSii中调用MODELSIM，实现仿真-ModelSim Experimental procedures QUARTUSii call MODELSIM, realize Simulation