脉冲宽度调制，编码，包括QuartusII和ModelSim工程…

实用的程序代码，希望对大家有用，已经调试通过-Practical program code, in the hope that useful to everybody, has debugging through

The AGC is a smart programmable gain amplifier (PGA). The amplifier gain is adjusted based upon the input signal level so that the output is at a specified Target Gain. The AGC can be configured to be either a mono or stereo input / output component. For illustration purposes, the following discussion will highlight the stereo configuration.

Turbo码编解码的FPGA实现，verilog语言编写(Implementation ofTurbo code on FPGA , using Verilog language)

对aurora模块时钟处理模块，实现时钟的分频等处理(Aurora module clock processing module,Clock frequency division and other processing)

这是一个版本的mp3播放器的迷你尺寸，你可以把它与AVR编程非常easy.it在这个项目这么简单，你使用的fat通过MMC的SPI总线，该总线使主从位置发送数据，然后用此主从，你可以从VS1003发送数据到你的ATmega8然后有一个非常简单的项目。

FIFo参考设计16x32 FIFO with simultaneous read/write operations.-FIFO design-16x32 FIFO with simultaneous read/write operations.

FPGA将从CY7C68013读到的数写入SRAM-FPGA will read a few CY7C68013 write SRAM

A complete VHDL source code to 5-storey elevator

A Full adder using half adder unit in vhdl

MPSK调制与解调VHDL程序源代码与仿真(MPSK modulation and demodulation process and VHDL source code and simulation)