电子自动售货机

用VERILOG HDL实现的任意 频率分频器源代码，是一个通用的程序-With VERILOG HDL realize arbitrary frequency divider source code, is a generic procedure

通过modelsim仿真检测matlab生成滤波器效果。(Generate the filter through matlab and simulated by modelsim.)

LOW pass FIR filter for multirate processing

这本书主要描述了如何使用system Verilog 建立测试平台和行为级模型(This book will describe how to use the system Verilog test bench and the establishment of behavioral models)

VHDL code for converting BCD to Decimal

Simulation and Synthesis Techniques for Asynchronous FIFO Design

this implemented multilplier in vhdl.this source code is useful for computer student and hardware engineering.-this is implemented multilplier in vhdl.this source code is useful for computer student and hardware engineering.

说明：  report for a report for a class

使用FPGA测量频率大小，并且在数码管上进行显示(Frequency measurement using FPGA and display on digital tube)

基于fpga与verilog语言的的sdram读写(SDRAM reading and writing based on FPGA and Verilog language)