verilog HDL编写的出租车计费系统

说明：  quartusii软件仿真实验代码 双二选一(quartusii software simulation code for a pair of two elections)

usb 硬件实现 请大家多多指教-usb hardware realize the exhibitions please everyone

很好的学习FPGA嵌入式的资料！适合初学者和工程师参考！(Good learning FPGA embedded information! Suitable for beginners and engineers reference!)

基于FPGA的PAL_VGA转换器的实现.pdf(FPGA-based PAL_VGA converter implementation)

基于NIOS2的VGA接口IP核，具有很好的借鉴性和参考性(NIOS VGA IP)

电子闹钟：基于fpga的电子闹钟设计，采用模块化方式-Electronic alarm: FPGA-based electronic alarm clock design, modular approach

一个简易的数字频率计，可以对一个输入的信号频率进行测量并显示输出，适合VHDL的初学者-A simple digital frequency meter, you can enter the signal of a frequency measurement and display output, suitable for beginners VHDL

使用VHDL编写语言，巧妙的利用计数器和循环输出一个坐标系，由于VHDL出现负数比较麻烦，全部由正数代替，输出一个原点在中心，半径128的256×256的坐标。方便坐标变换以及用此坐标做算法。(Use of VHDL language, clever use of counter and loop outputs a coordinate system, because VHDL negative too much trouble, all replaced by a positive number, the output an origin at the center, radius 128 256 256 coordinates. Convenient coordinate transformation and coordinate to do with this algorithm.)

本程序是锁相环的仿真程序，具有接收端载波同步的功能。注释详尽，程序规范。发端的调制方式有单载波调制，BPSK调制，QPSK调制可供选择。程序中有星座图，锁相环的频差、相差图，以及解调后的基带波形。(This program is a phase-locked loop simulation program, the with carrier synchronization receiving end function. Notes detailed program specifications. The originator of the modulation scheme to choose a single carrier modulation, BPSK modulation, QPSK modulation. Program constellation diagram, the PLL frequency difference, a difference of FIG, and the demodulated baseband waveform.)

基于FPGA的多功能波形发生器,很好的,使用Verilong程序。(FPGA-based multi-function waveform generator, a good use of Verilong program.)