VHDL产生时钟50分频程序，供初学者参考

VHDL语言按VGA接口标准把数字图像信号转换成标准VGA格式。适合做学习试验-VHDL by VGA interface standards, digital image signal conversion into a standard VGA format. Suitable for the pilot study

说明：  stm32f103 usart 控制led灯(STM32F103 USART control LED)

一个用Verilog编写的编帧、解帧及码速匹配的程序，相当经典-Verilog prepared with a series of frames, frames and solutions yards speed matching procedures, rather classic!

VHDL 波形防止抖动程序,学习试验材料(VHDL prevent jitter waveform procedures, the pilot study materials)

本程序是用verilog 编写的模块，用来在lcd1602上显示用tlc549采样的电压值(This program is written in verilog module, used in lcd1602 display with tlc549 sampled voltage value)

altera remote updata cyclone5 平台例程，无nios核版本(altera remote updata cyclone5 platform routine do not use nios)

说明：  实现fpga 读写flash 在k7上验证(Realization of FPGA read-write flash verification on K7)

用VHDL写的4*4乘法器，学习VHDL语言的可以-Use VHDL to write the 4* 4 multiplier, learning VHDL language can be

vhdl应用汇编所写的关于电梯的详细程序-Applications written in VHDL compilation of detailed procedures on the elevator

此代码是由FPGA产生SPWM波的代码，简单易懂(use FPGA to generate SPWM)