四进制计数器模块，使用VHDL语言编写，在ISE8.1中经过测试的模型...

高速高性能FFT处理器的VLSI实现研究，适合做FPGA的技术人员参考研究FFT-High-speed high-performance FFT processor VLSI realization of research, suitable for FPGA technology reference study FFT

四位动态刷新数码管显示，ＶＥＲＩＬＯＧ代码，含详细的中文注释．-Four dynamic refresh digital tube display, VERILOG code, with detailed notes in Chinese.

利用LPM_MUIT宏模块设计一个四位数据乘法器(Use LPM_MUIT macro module design a four data Multiplier)

用VHDL写的交通灯控制源码，原创，希望对大家有所帮助-Use VHDL to write a traffic signal-controlled source, originality, and they hope to help everyone

基于FPGA实现交织 在通信中交织的算法 已在板上通过测试(based on FPGA to Interleaver)

智能小车用到的c程序，单片机C语言与FPGA的 VHDL语言的结合(Smart car used c program, microcontroller C language and the combination of FPGA VHDL)

AHDL语言介绍，很详细的介绍AHDL语言介绍，很详细的介绍(AHDL language introduction, a detailed explanation)

jesd204b接收部分程序和带仿真历程(Jesd204b receiving part program and simulation process)

FPGA_CPLD-SHC多款FPGA CPLD开发板的原理图，很好的线路设计参考(FPGA_CPLD-SHC Variety of FPGA CPLD development board schematics, a good reference circuit design)

一个电子中的verilog实验源代码。适合verilog初学者学习参考-an electronic experiments of Verilog source code. Suitable for beginners learning Verilog reference