四进制计数器模块，使用VHDL语言编写，在ISE8.1中经过测试的模型...

计时器=================(Timer =================)

说明：  verilog语言写的SPI接口,全同步设计,低门数,可以很容易应用到嵌入设计方案中.(Verilog language to write the SPI interface, all synchronous design, low gate count. it is very easy to use embedded design programs.)

The program is used to establish communication with the pc through serial port. It utilses the inbuilt micro controller called as picoblaze for the processing for implementation on spartan 3E

? 熟悉IIC协议总线协议，采用IIC总线对图像采集传感器寄存器进行配置，并转换为RGB565格式。 ? 利用异步FIFO完成从摄像头输出端到SDRAM 和SDRAM 到VGA 接口各跨时钟域信号的传输和处理。 ? 利用 SDRAM 接口模块的设计，实现了刷新、读写等操作；为提高SDRAM 的读写带宽，均采用突发连续读写数据方式；并采用乒乓操作实现 CMOS 摄像头与VGA的帧率匹配。 ? 利用双线性插值方法实现对图像640×480到1024×768的放大操作。 ? 完成VGA显示接口设计。(Familiar with IIC protocol bus protocol, IIC bus is used to configure the register of image acquisition sensor and convert it into RGB565 format. Asynchronous FIFO is used to transmit and process signals across clock domain from camera output to SDRAM and SDRAM to VGA interface. With the design of SDRAM interface module, refresh, read and write operations are realized. In order to improve the read and write bandwidth of SDRAM, burst continuous read and write data mode is adopted, and table tennis operation is used to achieve frame rate matching between CMOS camera and VGA. The bilinear interpolation method is used to enlarge the image from 640*480 to 1024*768. Complete the VGA display interface design.)

说明：  ertyguhijop[lkjhvbn hiouopi][[poiuy

this come from alter ,you can look and find it on line about jtag.

说明：  串口！ 这是一个使用的通信程序 ， 非常好用。(serial port Serial port! This is a communication program used, very useful.)

design ram v8051 for project

浮点数运算的FPGA实现，包括仿真文件。-FPGA realization of floating-point operations, including the simulation file