一篇比较好的spi接口的vhdl实现的参考

用vhdl语言描写的存储器的读写，通俗易懂，简单实用。-Using VHDL language description of the memory read and write, user-friendly, simple and practical.

Implement the 7 segment diplay on spartan 3

uart串口传输的verilog RTL级源码，已通过仿真验证。文件主要包含发送、接受位处理，发送、接受字节帧处理，对学习串口通信的朋友很有帮助-uart serial transmission verilog RTL-level source code has been verified by simulation. File mainly contains the send, receive digital processing, sending, receiving bytes of frame processing, serial communications, a friend of learning helps

实现psk调制解调，vhdl代码，仿真文件也有(psk shixian tiaozhiyujietiao)

利 用 来 vhdl 设 计 p cm的 实 现-Vhdl design used for the realization of p cm

VHDL_COUNTING 000_255 液晶显示器 (ĐẾM 000 ĐẾN 255 HIỂN THỊ 液晶电视 BẰNG NGÔN NGỮ VHDL)

异步串行传输的verilog hdl 功能文件以及测试文件(The verilog hdl source and the testbench of asynchronous serial transmission )

EDA中常用模块VHDL程序，不同时基的计数器由同一个外部是中输入时必备的分频函数。分频器FENPIN1/2/3(50分频=1HZ，25分频=2HZ，10分频=5HZ。稍微改变程序即可实现)-EDA VHDL modules commonly used procedure, the time- with a counter by the external input is required when the sub-frequency functions. Frequency Divider FENPIN1/2/3 (50 1HZ frequency = 25 = 2HZ-frequency, frequency = 10 points Stripper. A slight change in procedure can be realized)

this implemented multilplier in vhdl.this source code is useful for computer student and hardware engineering.-this is implemented multilplier in vhdl.this source code is useful for computer student and hardware engineering.

FPGA课程设计源码，整合VGA,PS2键盘，CORDIC三角函数算法，在basys2平台上使用完全可行。(FPGA curriculum design source, integrated VGA, PS2 keyboard, CORDIC trigonometric algorithm, used on basys2 platform entirely feasible.)