一篇比较好的spi接口的vhdl实现的参考

The AGC is a smart programmable gain amplifier (PGA). The amplifier gain is adjusted based upon the input signal level so that the output is at a specified Target Gain. The AGC can be configured to be either a mono or stereo input / output component. For illustration purposes, the following discussion will highlight the stereo configuration.

运用VHDL语言编写的交通灯实现程序,能模拟十字路口的交通灯控制(VHDL language using traffic lights to achieve program can simulate the traffic light controlled crossroads)

USB设备接口的驱动程序，采用verilogHDL语言编写，并包含相关说明资料(USB device driver interface, using verilogHDL language, and contains descriptive information)

6通道正弦波发生器，产生频率，相位，幅值都可调的正弦波形-6-channel sine wave generator, resulting in frequency, phase, amplitude of the sinusoidal waveform are adjustable

该程序实现的N位全减器，首先实现一位的减法器，之后实现N位全减器。-Program of the N-bit-wide reduction, the first realization of a subtraction for, after all N-reduction devices.

verilog code for 8 bit alu

基于XIlinx ISE，用Verilog语言实现3分频电路，适合初学者(Based XIlinx ISE, Verilog language using the frequency dividing circuit 3, suitable for beginners)

本程序为四路抢答器verlog HDL语言工程实例。(This program is four Responder verlog HDL language engineering examples.)

通用串行异步收发器8251的Verilog HDL源代码,经过仿真验证。 -Universal Serial Asynchronous Receiver Transmitter 8251 the Verilog HDL source code, through simulation.

CAN总线开发代码，FPGA与sja1000通信，可实现CAN的接收和发送。(The FPGA and the sja1000 CAN bus development code, communication, which CAN realize the CAN send and receive.)