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baseband_verilog
verilog实现的基带信号编码,整个系统分为六个模块,分别为:时钟模块,待发射模块,卷积模块,扩频模块,极性变换和内插模块,成型滤波器(verilog implementation baseband signal coding, the entire system is divided into six modules, namely: the clock module, to be launched modules, convolution module, spread spectrum modules, polarity transform and interpolation modules, forming filter)
- 2009-10-08 10:19:34下载
- 积分:1
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Four-controllable-counter
说明: 功能是(用Verilog语言的,内有比较详细的注释):
(1)计数器的功能是从0到9999计数,并能以十进制数的形式在七段数码管上显示出来(包括七段数码管显示模块).
(2)该计数器有一个1个nclr和一个adj_plus端,在控制信号的作用下(见下表),计数器具有复位、增或减计数、暂停的功能。编写以上的程序的完整模块.
计数器的功能表
nclr adj_minus 功 能
0 0 复位为0
0 1 递增计数
1 0 递减计数
1 1 暂停计数
(Function is (with Verilog language, the more detailed comments): (1) counter function is from 0 to 9999 counts, and are able to form a decimal number on the seven-segment LED display (including the seven-segment LED display module). (2) The counter has a one nclr and a adj_plus side, under the action of the control signal (see below), the counter has reset, increase or decrease of count pause function. Complete the preparation of the above program modules. Counter function menu nclr adj_minus reset 0 0 0 0 1 1 0 counts counting suspended Count 1 1)
- 2011-03-01 22:47:51下载
- 积分:1
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ix746
Nonlinear discrete system identification, It uses a pulse of consumer law, Partial least squares method.
- 2017-08-28 20:46:28下载
- 积分:1
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described dds direct digital frequency synthesis of the basic tenets addition to...
讲述了dds直接数字频率合成的基本原理,同时用VHDL语言编写dds原代码用于生成正弦波,并在ISE开发平台进行仿真和MATLAB验证正弦波输出结果-described dds direct digital frequency synthesis of the basic tenets addition to the use of VHDL prepared dds source used to produce sine, and ISE development platform for simulation and verification MATLAB sine wave output
- 2022-07-08 20:48:31下载
- 积分:1
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AD0809芯片DA0832程序实现
芯片ad0809与da0832的实现程序-ad0809 chip with the realization procedures da0832
- 2022-02-04 08:56:35下载
- 积分:1
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Study_Test
实现简单的硬件加法器、除法器,实现源码文中注释(Realize simple hardware adder and divider, realize source code)
- 2020-06-21 05:20:01下载
- 积分:1
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test-ram
design ram v8051 for project
- 2013-07-08 23:24:20下载
- 积分:1
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VHDL版的C51核(MC8051)
VHDL版的C51核(MC8051)-VHDL version of the C51 core (MC8051)
- 2022-06-19 21:32:45下载
- 积分:1
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zidongmen1
控制步进电机转动,正反转,旋转角度完美掌握。很好用,亲测(Control stepping motor rotation, positive and negative rotation, perfect control of rotation angle. Very easy to use, personal test)
- 2018-12-25 16:41:07下载
- 积分:1
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RS485verilog
这是用Verilog写的RS485通信程序,可以使用,希望大家能够互相交流,(This is a Verilog writing RS485 communication program, can be used, I hope we can communicate with each other,)
- 2021-04-01 15:59:08下载
- 积分:1