自动识别行人有无的交通灯

能够实现 LCD时序驱动,通常cpu送出的信号为data bus信号，液晶屏幕并不能正常显示，需要lcd driver(LCD timing controller, usually cpu send out the data bus signal, so the lcd driver can t display normally, need the driver)

检测上升沿的verilog程序，有验证程序，可用synplify验证-Detection of rising edge of the Verilog procedures, there is the verification process can be used to verify Synplify

Control Unit VHDL code. Xilinx Spartan 3E board

说明：  FPGA实现乒乓球游戏 代码及仿真 VGA实现(FPGA realizes table tennis game code and simulation VGA implementation)

VHDL语言写的波形发生器和sine波形发生器,一共两个文件，通信开发平台专用。这是一个典型的正玄波发生器程序和一个任意波形发生器程序，大家可以参考学习，对于vhdl入门还是很有帮助的-This is a typical wave generator Shogen procedures and an arbitrary waveform generator procedures, Members can take a learning portal for VHDL or helpful

VHDL 的100例程代码，能够使你熟练掌握VHDL语言的编写(100 routines of VHDL code, enabling you to master the preparation of the VHDL language)

扰码器的verilog实现,参考802.11a相关标准-Scrambler in verilog implementation

说明：  I2C 从设备通讯应用示范程序，用于I2C设计验证(I2C slave communication application demo program, used to for I2C design verification )

verilog语言实在点变换DFT源代码，可以配合软核或者其他CPU进行综合FFT变换，也可以单独使用生成module！(verilog language is point FFT transform source code, can tie in with the soft-core CPU, or other integrated FFT transform, it can be used to generate module!)

利用VHDL语言实现PID控制,已经过调试验证。(Using VHDL language to implement PID control)