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sync_bitops
Set a bit and return its old value.
- 2015-06-23 14:22:31下载
- 积分:1
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树式除法型开方器VERILOG实现,用于任意长度的无符号数的开方运算...
树式除法型开方器VERILOG实现,用于任意长度的无符号数的开方运算-Square root of the tree-type divider-type device to achieve VERILOG
- 2022-09-04 14:20:03下载
- 积分:1
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电子表,实现计时记分计秒的功能,同时可以对时分秒进行校正,实现调时功能。...
电子表,实现计时记分计秒的功能,同时可以对时分秒进行校正,实现调时功能。-Electronic watches, time points of dollars to achieve a second function, at the same time when the minutes and seconds can be calibrated to achieve when the transfer function.
- 2022-06-03 13:45:21下载
- 积分:1
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LCD例程 altera官方Verilog代码 详尽简单实用
LCD例程 altera官方Verilog代码 详尽简单实用-LCD routines altera official Verilog code is simple and practical details
- 2022-09-20 01:40:03下载
- 积分:1
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这个我也太清楚是什么 反正师兄们说有用 发大家
这个我也太清楚是什么 反正师兄们说有用 发大家-I am also very clear that what is useful anyway, say senior U.S. fa
- 2022-08-11 05:38:06下载
- 积分:1
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adder
说明: 通过四个半加器的互联,来实现四位加法器的电路结构(Through the interconnection of four and a half adder to achieve the four adder circuit)
- 2011-02-20 15:17:15下载
- 积分:1
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SineGen
Basic VHDL code to create a sine wave generator for an FPGA board.
- 2014-01-24 01:04:15下载
- 积分:1
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mac_layer_switch_latest.tar
source code for Ethernet logic
- 2017-04-05 08:04:27下载
- 积分:1
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24_LCD12864_DISPLAY
基于altera公司的fpga的lcd12864显示字符汉字的模块,模块接口简单易于复用。(Altera fpga-based company s lcd12864 display kanji character module, the module interface is simple and easy to reuse.)
- 2014-03-27 13:44:09下载
- 积分:1
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MTKhardwaretraing
MTK平台硬件培训MTK平台硬件培训MTK平台 GSM双频手机接收信号
处理流程MTK平台 GSM双频手机接收信号
处理流程
(MTK platform hardware training platform hardware training MTK MTK GSM dual-band mobile phone platform to receive the signal processing)
- 2010-08-05 00:12:33下载
- 积分:1