采用高速AD的存储示波器设计，基于EP1C3板GWADDA板存储示波器，内有说明文件...

说明：  对于一串二进制数前置零的计数的Verilog程序(For a string of binary zero count Verilog pre-procedure)

具有多种功能的电子钟：闹钟，报时和修改，定时闹钟，报时时间，带闹钟，报时开关。-with multiple functions of electronic bell : alarm clock, timer and modification, regular alarm clock, timer, with alarm clock, timer switches.

SPI的Verilog实现(非常的全面和详细，还带有SPI算法的注解)(SPI in Verilog implementation (a very comprehensive and detailed, but also with the SPI algorithm annotation))

FAST HADAMARD TRANSFORM VERILOG FOR IMAGE PROCESSING

its a Fifo BASED design i also Interface DAC2904

使用vhdl语言在altera公司的up3板上产生vga信号，里面有详细的解析和说明，是一个很好的教程。-use of the VHDL language ALTERA company"s board up3 have vga signal containing a detailed analysis and explanation is a good guide.

基于FPGA cyclone2的偶数分频模块，可实现自定义分频数(Based on FPGA cyclone2 even number of frequency divider module, custom frequency divider can be realized.)

4X4keypad的防抖动模块，用于假按键的检测-4X4keypad shake the module, the keys for false detection

说明：  用VHDL语言设计一个校验器，用for loop实现8位数据的偶校验，(With a for loop to achieve 8-bit data parity)

一个在FPGA芯片上实现UART功能的vhdl源代码，提供了UART的集成-an FPGA chip to achieve UART function vhdl source code, providing integrated UART