buffer for in/out data.

代码基于VHDL语言的个文化代码有用的但是可能有错误下在是倾销心-VHDL code based on the cultural code useful but may be under the wrong heart is dumping

接口键盘和液晶屏上AT89S52代码

利用fpga实现gmsk的调制并仿真，全部代码(Fpga implements gmsk)

基于LabVIEW FPGA的频谱估计与分析(the power spectrum estimation and analysis based on LabVIEW FPGA)

2004 SNUG of systemverilog

自动售卖机的设计，有源代码，希望对大家有用-Vending machine design, source code, in the hope that useful

基于DDS的信号发生器设计。DDS,FPGA,Verilog。(Design of signal generator based on DDS.DDS,FPGA,Verilog.)

国外经典verilog代码，很适合初学者，其中的有些概念对老手也可以考虑下-Foreign classic Verilog code, it is suitable for beginners, of which some of the concept of a veteran may also want to consider under the

以嵌入式CPU和FPGA为基础的嵌入式系统架构-Embedded CPU and FPGA-based embedded system architecture

vhdl code for carry lookahead addder