接口键盘和液晶屏上AT89S52代码

说明：  Implementing SMPTE SDI Interfaces with UltraScale GTH Transceivers

altera DE1 SD_CARD带写入一个扇区功能的程序，已确认成功，下载直接运行就可以看效果-altera DE1 SD_CARD with a sector write function procedures, has confirmed the success of running can be downloaded directly watch the effect of

用VHDL和verilog实现的四人抢答器-using VHDL and verilog realization of four Responder

四路控制抢答器模块设计 他的基本功能是，在四组参赛的情况下，首先抢答的发出抢答信号，此时其它抢答电路失去控制作用，在优先抢答的要在固定时间进行答题，否则直接扣一分

VHDL,简易音频数字相位表的设计与实现 数字相位测量仪在工业领域中经常用到的一般测量工具，主要应用与同频率正弦信号间的相位差的测量显示。 本系统采用FPGA实现测量的核心部分，主要由数字鉴相、累加计数器、控制器以及寄存与显示译码电路组成。该系统硬件电路简单，整个系统采用硬件描述语言VHDL作为系统内部硬件结构的描述手段，在XILINX公司的ISE9.1的软件支持下完成。可以对20Hz~20kHz频率范围内的音频信号进行采样鉴相处理，并将数据传回FPGA进行相位差计数累加、测量运算，最后送显示译码电路显示，测相范围为 ，相位测量误差 < 。 经测试结果验证，本系统充分利用FPGA对数据的高速处理能力，是系统设计高效、可靠，处理速度快，稳定性高，易于实现。 (VHDL, simple audio digital phase Table Design and Implementation of the digital phase meter general measurement tools are often used in the industrial field, the measurement of the phase difference between the main application with the same frequency sinusoidal signal. The system uses the FPGA implementation of the core part of the measurement, mainly by the digital phase, cumulative counter, the decoding circuit of the controller as well as storage and display. The system hardware circuit is simple, and the entire system using hardware description language VHDL system means a description of the internal hardware structure, completed in the XILINX company ISE9.1 software support. The audio signal in the frequency range of 20Hz ~ 20kHz sampling KAM-phase process, and the data returned FPGA retardation counted accumulation measuring operation, and finally sent to the decoding circuit, the scope of the measurement phase, the phase measurement error < . The test results verify the full u)

vhdl表示与综合，原书第二版，中文版，比较全，用超星打开-vhdl

1路视频光端机的接收端，VHDL源码，使用全FPGA芯片的硬件，内建解帧、时钟、DESERDES-PDH a video of the receiving end, VHDL source code, use the whole FPGA chip hardware, built-in framing, clock, SERDES

FPGA Implementation of QFT based Controller for a Buck type DC-DC Power Converter and Comparison with Fractional and Integral Order PID Controllers

Verilog版的C51核(OC8051)-Verilog version of the C51 core (OC8051)

说明：  ADD MOV MOVi SUB四指令cpu设计，qutartus，(Design of four-instruction CPU)