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通过VHDL语言的例子,通过乒乓球运动FPGA原型楚原型(1章)
应用背景FPGA原型的VHDL例子提供一系列清晰,易于遵循的快速代码开发模板;大量的实际例子来说明和强化的概念和设计技术;现实可实施的项目和测试在Xilinx原型板;深入探索和Xilinx PicoBlaze软核微处理器。关键技术本书采用“做中学”介绍VHDL和FPGA技术的概念和设计人员通过一系列的实验方法。
- 2022-03-18 13:19:49下载
- 积分:1
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BCD
BCD码减法实现程序,非常完整,采用Verilog HDL语言实现。(BCD subtraction to achieve program code, very complete, using Verilog HDL language.)
- 2010-08-04 16:43:26下载
- 积分:1
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ML605板子上的灯
ML605评估板上的流水灯,可以实现每隔0.16秒进行+1操作
#include
#include
#include
#include
#include
int main()
{
char a[] = "-100" ;
char b[] = "123" ;
int c ;
c = atoi( a ) + atoi( b ) ;
printf("c = %d
", c) ;
return 0;
- 2022-06-01 23:28:16下载
- 积分:1
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eluosi_game
这是一个基于NIOSII的俄罗斯方块游戏设计,是基于FPGA的,利用流模式DMA传输实现游戏。(This is a box based on the Russian NIOSII game design, is based on the FPGA, and the use of streaming mode DMA transfer realize the game.)
- 2007-09-29 23:52:25下载
- 积分:1
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Verilog implementation USB program, open the project file with the ISE can be
Verilog实现的USB程序,用ISE打开工程文件即可-Verilog implementation USB program, open the project file with the ISE can be
- 2022-01-21 21:28:31下载
- 积分:1
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实验17 ADC实验
鉴于stm32在keil平台上的ADC采集转化,在LCD屏上显示程序(voltage acquisition adc)
- 2020-06-20 12:40:02下载
- 积分:1
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Flicker_LED
It s Flicker_LED code.Verilog for MaxV.
- 2013-08-08 10:16:32下载
- 积分:1
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SDRAM_DDR
SDRAM_DDR控制器verilog代码及中文说明文档。(The SDRAM_DDR controller Verilog code and documentation in chinese.)
- 2013-02-06 10:48:57下载
- 积分:1
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DS1302
说明: 本代码是控制DS1302的VHDL代码,浅显易懂,方便修改,注意看data sheet,保证时钟和各个延迟满足要求即可(This code is to control the DS1302' s VHDL code, easy to understand, easy changes, note the data sheet, ensure the clock and can meet the requirements of the various delays)
- 2020-10-22 14:57:23下载
- 积分:1
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Interleaver_Deinterleaver
通信中卷积交织/解交织FPGA源程序,采用verilogHDL代码实现,包含测试程序,经过验证。(Communication in the convolutional interleaving/de interleaving FPGA source program, using verilogHDL code to achieve, including test procedures, after verification.)
- 2021-04-17 15:18:53下载
- 积分:1