寄存器 32 位

quartusii 三分频电路，大家帮参考一下，有什么问题-one-third of quartusii frequency circuit, refer to U.S. help, have any problem

four bit counter verlog source code for veriwell including test bench

THE SOURCE REALIZE THE TRANSFORMATION FROM YUV TO RGB

H.265的FPGA实现！！使用Verilog语言开发。(H.265 FPGA implementation! Developed using Verilog language.)

FPGA实验，实现了蜂鸣器发出不同的音调，利用按键，很好玩的-FPGA experiment, realized the buzzer sounded a different tone, the use of keys, it is fun

本例为电子琴VHDL程序原代码,电子琴,可实现基本功能-In this case the procedures for organ VHDL source code, organ, can realize the basic functions of

一个8位的CPU设计，用verilog语言写的，希望有用(A CPU OF 8 BITS )

使用altera公司的FPGA进行VHDL开发，使用quartus2 9.0 软件在EP1C3T144C8开发板上实现跑马灯输出。-Altera company s FPGA using VHDL to the development, use quartus2 9.0 software EP1C3T144C8 Development Board to achieve ticker output.

自动售货机的状态机实现 自动售货机的状态机实现(this is a automachine)

这是我的VHDL格式的电子密码锁源程序，请站长审核啊-This is my VHDL source code format of the electronic lock, please review ah owners