适用于FPGA的SOPC方面的元器件添加，如COMPNENT

ADS7870 Serial ADC Interface Using a CPLD, The system includes an XPLA3 CoolRunner CPLD, a Texas Instruments ADS7870 ADC, and a Toshiba SRAM, All related VHDL source code is provided

说明：  APPCM算法和AD/DA芯片驱动在CPLD中的实现，已在实际硬件中测试OK，quartus2环境(APPCM algorithm and AD/DA chip in the drive to achieve in the CPLD has been tested in actual hardware OK, quartus2 environment)

vga接口的工程实现，基于altera环境，需要的可以-vga interface engineering implementation, based on altera environment, need to take a look at

dual port ram control (dual port ram control dual port ram control dual port ram control)

NiosII的C代码,包括网卡,lcd,usb,串口,按键.(NiosII C code, including network cards, lcd, usb, serial, key.)

说明：  LTE is an abbreviation for Long Term Evolution.

这里是apb总线设计代码。这个源程序是基于verilog语言设计的(Here is the APB bus design code. This source program is designed based on Verilog language)

cpu微命令vhdl源代码-cpu-order VHDL source code

使用vhdl语言实现对led的控制，还有电路仿真-Using vhdl language implementation of the led control, as well as circuit simulation

电梯控制器程序设计与仿真的vhdl源代码-Elevator controller design and simulation of vhdl source code