由VHDL 语言实现的数控分频 利用的是QUARTUES环境已经得到验证...

least mean square algo implemented on verilog

lab report for lab 4

在ＦＰＧＡ中产生的频率可调的锯齿波型信号发生器(The frequency of the FPGA to generate the sawtooth waveform signal generator adjustable)

这个是一个基于FPGA的SDRAM控制器系统，实现对SDRAM的读写操作，用来实现时序的控制-This is an FPGA-based SDRAM controller system, the read and write operations to SDRAM to achieve the control of timing

针对京微雅阁的CME300 FPGA教程，里面有几个例程，并附有源代码，初学者可尽快入门。(For Beijing micro Accord CME300 FPGA tutorial, there are a few routines, with source code, beginners can start as soon as possible.)

华莱士树乘法器，运用了华莱士树状结构和布斯算法，提高了速度(The Wallace tree multiplier uses the Wallace tree structure and the Buss algorithm to increase speed)

电子设计自动化中的计数器的实现程序，基于VHDL语言完成的-Electronic design automation in the realization of counter procedures, based on the VHDL language completed

通过监测工作状态实现带有IIC通讯功能的数据发送接收(to implement the sending and receiving data function of iic communication )

i2s串行线广泛用于音频通信中,这里包括了master和slave的代码.-i2s serial lines widely used in audio communication, here including the master and slave codes.

随机数发生器