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fir_512_378_mux
512阶高速FIR成型滤波器,四相位复用,树形加法和多级流水线结构。(512-order high-speed FIR shaping filter, four-phase re-use, tree addition and multi-stage pipeline structure.)
- 2009-10-14 18:25:24下载
- 积分:1
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vhdl的仿真
quartus 2的flv视频
vhdl的仿真
quartus 2的flv视频
-VHDL simulation of the flv video quartus 2
- 2022-04-12 23:18:28下载
- 积分:1
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OFDM_CP
ofdm系统的matlab实现,包括插入导频信号和循环前缀(Matlab implementation of ofdm system, including inserted pilot frequency signal and the cyclic prefix)
- 2013-05-29 10:10:23下载
- 积分:1
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XDS100v3-Design-Kit-1.0-Setup
压缩包是ti xds100v3 Design kit的安装文件,安装后有原理图、PCB文件,与DSP接口采用FPGA,安装后有源码,是VHDL格式的,支持开源,降低开发成本(Compression package is ti xds100v3 Design kit installation file after installation schematics, PCB files, and DSP interface with FPGA, after installation source is VHDL formats, support for open source, reduce development costs)
- 2014-08-28 09:36:34下载
- 积分:1
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针对于Virtex5FPGA的DDR2读写测试的完整工程
资源描述针对于Virtex5FPGA的DDR2读写测试的完整工程,已测试可以使用,可以根据自己的ddr2配置自行更改。。。。
- 2023-02-19 21:40:05下载
- 积分:1
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codings
wavelet transform of a signal,it is important and useful code to trans form frequency to time domain
- 2013-11-10 15:10:32下载
- 积分:1
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soble
基于FPGA的Sobel边缘检测算法的实现与仿真。此程序提供算法的verliog实现。(Implementation and Simulation of Sobel edge detection algorithm based on FPGA. This program provides the verliog implementation of the algorithm.)
- 2017-08-30 16:06:04下载
- 积分:1
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DE2_115_pin_assignments
de2-115引脚的配置,quartusII的设置(de2-115 configuration pins, quartusII settings)
- 2020-07-01 13:40:02下载
- 积分:1
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30
说明: 30 bus for atp design
- 2016-02-14 19:41:55下载
- 积分:1
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16ChannelDeserializer
说明: LVDS De-serialization
- 2019-06-20 14:53:25下载
- 积分:1