跑马灯程序FPGA

说明：  该资料是用vhdl编写的按键消抖程序，按键消抖在使用按键的数字电路中非常重要，如果不对按键信号进行处理，有可能会出现大量错误的按键信号。文件key_xd.vhd是按键消抖程序，文件key_xd.vwf是仿真波形文件。该程序已经通过仿真测试，并且在电路板上调试通过，效果理想。(The information is written in the key consumer vhdl shaking procedures, key consumer shaking in digital circuits using the buttons is very important, if not key signal processing, there may be a lot of the wrong button signal. File key_xd.vhd is key consumer shake procedure is the simulation waveform file key_xd.vwf file. The program has been tested by simulation and debugging in circuit board by, the results are satisfactory.)

FPGA实现BPSK调制，带Modelsim仿真，实际系统测试通过，载波信号，调制波信号频率可调(FPGA implementation BPSK modulation with Modelsim simulation, the actual system test, the carrier signal, modulated wave signal frequency adjustable)

Verilog经典教程，很好的学习Verilog的书籍，对学习硬件编程很有帮助。(Verilog classic handbook, good learning Verilog books, to learn hardware programming helpful.)

用于fpga学习，共同分享学习经验和交流学习心得-For fpga to learn, to share learning experiences and the exchange of learning

EMP3064的开发板板，原理图，verilog例子，板子说明，规格书，全套资料(EMP3064 development board, schematics, Verilog examples, board instructions, specifications, a full set of information)

初学verilog HDL时 找的好资料 大家共享-Beginners should try to find a good share information

design and implement a digital system on the Altera NIOS board which will read an analogue input using MicroChip’s SPI MCP3202 12-Bit A/D converter. The 8 most significant bits of the converted data will be displayed on two seven segments of the NIOS development board. The sampling frequency is 20kHZ. Use a potentiometer.(design and implement a digital system on the Altera NIOS board which will read an analogue input using MicroChip' s SPI MCP3202 12-Bit A/D converter. The 8 most significant bits of the converted data will be displayed on two seven segments of the NIOS development board . The sampling frequency is 20kHZ. Use a potentiometer.)

用VERILOG实现 交通灯控制，且运行正确，希望有帮助(Use VERILOG implementation traffic light control, and operation right, hope to have help)

FPGA（赛灵思）试验箱 实验程序 有Audio,Buzzer,key,ledarray,ledseg.......(FPGA（赛灵思）试验箱 实验程序Audio,Buzzer,key,ledarray,ledseg)

正弦波在dspbuilder下产生VHDL源码及其测试激励文件的matlab模型,在modelsim下仿真通过-sine wave in dspbuilder under VHDL source code and test incentives document matl ab model, the simulation under through modelsim