LMS自适应均衡器

FPGA时序分析说明。对于高速时钟设计中的时序分析与约束有帮助(FPGA,TIME)

这是基于Nios II的12864液晶点亮程序，包含汉字、字符等(This is a program which is based on Nios II ,its function is light the 12864 LCD that including Chinese characters, characters)

this is a Multiplier and Accumulate (MAC). written in VHDL

32位元浮点数加法器,用于以VHDL编写的32位元CPU-32 bits floating-point Add

inter integrated circuit i2c protocol

DDS在现在运用月来越广泛，在相对带宽、频率转换时间、相位连续性、正交输出、高分辨力以及集成化等方面都远远超过了传统频率合成技术所能达到的水平，为系统提供了优于模拟信号源的性能。利用DDS技术可以很方便地实现多种信号。在FPGA上实现的DDS-DDS now to the use of more extensive relative bandwidth, frequency conversion time, phase continuity, quadrature output, high-resolution and integration, and other aspects far more than the traditional frequency synthesizer technology can achieve the level To provide a superior analog signal source performance. DDS technology can be used very easily to a variety of signal. FPGA Implementation of DDS

用fpga芯片使用vhdl语言对AD转换芯片ADC0809进行控制(Using the fpga chip use language of VHDL AD transform chip ADC0809 control)

学习ISE的好资料，想要使用XILINX芯片进行开发必看(ISE learning good information, want to use a must-see XILINX chip development)

使用Ｖeriolog hdl 编写手机屏测试程序．-Veriolog hdl prepared to use cell phone screen test.

电梯控制 记忆，上升下降停站 超载报警故障.....。-Verilog EDA dianti