descripe by the VHDL to drive the LCD cm12864,based on the FSM convertor,achieve...

说明：  SHA-1加密算法的IP核，内涵文档，仿真测试文件(SHA-1 encryption algorithm of the IP core, the connotation of documents, simulation test file)

一种基于FPGA的通用微处理器设计-A general-purpose FPGA-based microprocessor designs ....

ieee paper on power gating and can be use full for implementing on ip core

verilog HDL编写的浮点除法器，编译通过，可综合。压缩包包含三个文件。(verilog HDL write floating-point divider, compile, can be integrated. Archive contains three files.)

8位突发长度，一次64bit数据读写，MIG核(DDR3 controll implimention)

资源描述针对于Virtex5FPGA的DDR2读写测试的完整工程,已测试可以使用，可以根据自己的ddr2配置自行更改。。。。

library of protues aaaaaaaa

DE2使用手册，介绍DE2的所有组成元件，使用方法，还有相应的实例。(DE2 User Manual, describes all the components DE2 components, using the method, there is a corresponding instance.)

自己写的7人表决器的verilog程序，实现4人以上通过则通过的功能。(Seven people to write their own voting machine verilog program to achieve four or more people pass through function.)

压缩包是ti xds100v3 Design kit的安装文件，安装后有原理图、PCB文件，与DSP接口采用FPGA，安装后有源码，是VHDL格式的，支持开源，降低开发成本(Compression package is ti xds100v3 Design kit installation file after installation schematics, PCB files, and DSP interface with FPGA, after installation source is VHDL formats, support for open source, reduce development costs)