Combined unit GPS clock synchronization detection unit merger GPS synchronized c...

SPI接口的实现以及对外设的读写操作，其中包扩了几种工作方式，同时可以读取外设的版本号，传输速率可以达到2Mbps-SPI interface implementation, as well as read and write operations on the peripheral, which extended several work packages at the same time can read the version number of peripherals, transfer rate up to 2Mbps

利用stm32F407实现的等精度测频，可以精确测量频率，误差很小(The equal precision frequency measurement realized by stm32F407 can accurately measure frequency with little error.)

Verilog实现的VGA程序，用ISE打开工程文件即可-Verilog implementation VGA program, open the project file with the ISE can be

一个FPGA的AVR_Core 仅供测试~-AVR_Core an FPGA-only test ~

VHDL与源代码包-and VHDL source code

VHDL版的C8051核(C8051).evatronix公司的IP核-VHDL version of the C8051 core (C8051). Evatronix company s IP core

Use verilog language design DIGITAL-PID source

filter kalman mppt for PV

用AHDL语言编写,MAXPULS开发.通信不受外部时钟速率和数据字节数目限制.-with AHDL prepared MAXPULS development. Communications from external clock rate and restriction on the number of data bytes.

SPI接口测试程序，Xilinx参考设计，ML507硬件测试通过.(SPI interface test code，Xilinx reference design，tested on ML507 platform.)