跑马灯led_horse vhdl cpldfpga

采用VHDL语言设计的基于LUT的正弦波发生器，已通过调试，并给出了pics仿真结果

常见的几种电机的特征与控制方法-Several common characteristics of the motor and control method

altera 的reed solomn 设计(reed solomn design from altera)

verilog hdl coding DDR sdram control for fpga -verilog hdl coding DDR sdram control for fpga

本章介绍了两个EDA技术的综合应用设计实例:数字闹钟和直接数字频率合成器DDS。-EDA chapter describes the two technologies integrated application design example: digital alarm clock and direct digital synthesizer DDS.

用于FPGA的反Z变换算法的Verilog代码。可用于JPEG及MPEG压缩算法。-FPGA for the anti-Z transform algorithm of Verilog code. Can be used in JPEG and MPEG compression algorithms.

quartus环境下开发的三人表决器（三种不同的描述方式）maxplusII兼容

用于生成adams或recurdyn所需的路面不平度，用于悬架或其他的仿真(Adams or recurdyn used to generate the required road roughness for suspension or other simulation)

AUDIO音频模块AN831的录音及播放FPGA代码，测试通过(AUDIO audio module AN831 recording and playback of FPGA code, the test passed)

SystemVerilog For Design (Springer-2nd_Ed-2006)