该工程是基于verilog hdl 语言编写的帧传输协议HDLC帧的发送端代码，会用QUATUSII的人都应该知道如何使用，希望能给你带来帮助...

FPGA讲义适合中等以上读者，主要是FPGA的一些高级应用-FPGA notes for readers more than moderate, mainly a number of advanced applications FPGA

基于FPGA的视觉电生理图像刺激系统的设计(Based on the design of FPGA visual electrophysiology image stimulation system)

FPGA Implementation of QFT based Controller for a Buck type DC-DC Power Converter and Comparison with Fractional and Integral Order PID Controllers

Altera DE2 上使用 vhdl 语言设计 RS232 控制器。这是一个串口模块可用于嵌入系统。

扩跳频通信在QUARTUS7.0开发环境下的VHDL源程序及总体框图实现-Frequency-hopping communication QUARTUS7.0 expanded development environment in the VHDL source code and the achievement of the overall block diagram

文件用于驱动TFT屏，分辨率800*400，平台为quartus13，芯片为cycloneIV(The file is used to drive the TFT screen with a resolution of 800*400. The platform is quartus 13 and the chip is cyclone IV.)

本例程位于 VMD642_CPLD目录中。 使用 CPLD 实现辅助译码、LED 指示灯控制、看门狗等各种逻辑控制电路。源程序使 用 Verilog HDL书写，编译开发系统使用 Cypress公司的 Warp 6.3。(This routine is located VMD642_CPLD directory. Using CPLD implementation auxiliary decoding, LED indicator control, watchdog, and other logic control circuitry. Written using Verilog HDL source code, the compiler development system using Cypress' s Warp 6.3.)

卷积程序的Verilog程序，实现卷积功能(Convolution program Verilog program to achieve convolution function)

16卫浮点FFT算法的VHDL实现，有测试文件。-16 floating-point FFT algorithm Wei VHDL realize, have the test paper.

Implementation of Image Processing Algorithms in FPGA Hardware.