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ser_to_parr
很有用的10bit串并转换verilog程序,需要的可以拿去参考下,在quartusII上已验证过(Useful 10bit string and convert verilog program, need to take a reference, has been verified in quartusII)
- 2012-05-21 16:21:22下载
- 积分:1
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实光电码盘的输出数据的四倍频,使码盘输出精度提高四倍。...
实光电码盘的输出数据的四倍频,使码盘输出精度提高四倍。-real photoelectric encoder output data of the four frequency, accuracy encoder output increased by four times.
- 2022-01-23 10:41:40下载
- 积分:1
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QAM_verilog
基于FPGA的16QAM,用verilog编写,其中DDS为自己编写,含设计文件和testbench。已通过moldesim软件仿真。 (FPGA-based 16QAM, with verilog writing, including DDS for their preparation, including design files and testbench. Simulation software has been through moldesim.)
- 2021-02-22 18:29:41下载
- 积分:1
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QMD
实现了QPSK的调制,使用了ise自带的dds的IP核(QPSK is modulated and the IP core of DDS is used in ise.)
- 2019-05-05 15:37:58下载
- 积分:1
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ADC0832TLC5615
开关电源中用单片机产生可调电压控制PWM波程序,ADC0832读取输出电压(Single-chip switching power supply using adjustable voltage control PWM wave generation process, ADC0832 read the output voltage)
- 2011-09-16 23:37:27下载
- 积分:1
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rtl
基于脉动结构的有限域乘法器,verilog代码(Based on the pulse of the structure of finite field multipliers, verilog code)
- 2010-01-04 11:48:50下载
- 积分:1
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DE2_115_pin_assignments
de2-115引脚的配置,quartusII的设置(de2-115 configuration pins, quartusII settings)
- 2020-07-01 13:40:02下载
- 积分:1
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8051参考设计,和其他免费知识产权在8051相比,相对整个D。
8051参考设计,与其他8051的免费IP相比,文档相对较全,Oregano System 提供-8051 reference design, and other free IP in 8051 compared to relatively entire document, Oregano System for
- 2023-01-19 15:30:04下载
- 积分:1
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ex8_PWM
Ti dsp2407 PWM 源代码调试可运行(Ti dsp2407 PWM code)
- 2011-08-02 21:57:13下载
- 积分:1
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cpu
说明: 一个简单的CPU设计,支持add,sub,mvi,mv四条指令,用Verilog语言编写,在Quratus II上编译通过,仿真正确。(A simple CPU design, support add, sub, mvi, mv four instructions, with the Verilog language, compiled by the Quratus II, the simulation is correct.)
- 2011-04-09 12:22:09下载
- 积分:1