基于Verilog的2FSK的性能

这是一个EOS项目中的GFP成帧结构，能够容错，可以配置字节域(This is an EOS project GFP Framing structure, be able to fault-tolerant, can be configured byte domain)

文件用于驱动TFT屏，分辨率800*400，平台为quartus13，芯片为cycloneIV(The file is used to drive the TFT screen with a resolution of 800*400. The platform is quartus 13 and the chip is cyclone IV.)

大唐电信的FPGA设计经验，内部资料，详细完整，很有参考价值-Datang Telecom

用VHDL硬件语言实现的iic顶层控制程序-Using VHDL hardware language to achieve the top level of the IIC control procedures

JOP的内核缓存源码，不易找到，大家一定要顶啊-JOP kernel source code cache, not easy to find, we must kits

MP3解码器的VHDL源代码 ,很实用的，设计时可以参考 ，很罕见的完整MP3 decoder源码 -VHDL code for MP3 decoder

这是我在学习过程中编的数字钟的原程序,含各种时钟模块,以及计数器,累加器等,可以直接下载,已经编译通过!-This is my learning process in the middle of the 10-minute program, containing various clock module and the counter, accumulator, and can download, compile!

FPGA的专业综合工具，学习此第三方工具的经典教程-FPGA 专 业 酆 危 撸 学魏 说 叩 木坛

FPGA设计攻略及流程，包含时序收敛和引脚约束(FPGA design strategy and process, including time series convergence and pin constraints)