8位相 加乘法器，具有高速，占用资源较少的优点

说明：  处理器系统，处理器加上存储器，从存储器取出指令放入处理器执行(processor system, instructions stored in ROM, a counter generate address and the processor execute instructions.)

中央空调的控制，3级控制系统，这个是中间控制的vhdl源代码-Central air-conditioning control, 3 control system, this is the middle of the control of vhdl source code

Simulation and Synthesis Techniques for Asynchronous FIFO Design

自动售货机的状态机实现 自动售货机的状态机实现(this is a automachine)

calculate min max of series of nb

EKG SIGNAL PROCESSING THROUGH CORDIC

ML605评估板上的流水灯，可以实现每隔0.16秒进行+1操作 #include #include #include #include #include int main() {   char a[] = "-100" ;   char b[] = "123" ;   int c ;   c = atoi( a ) + atoi( b ) ;   printf("c = %d ", c) ;   return 0;

这是一个基于NIOSII的俄罗斯方块游戏设计，是基于FPGA的，利用流模式DMA传输实现游戏。(This is a box based on the Russian NIOSII game design, is based on the FPGA, and the use of streaming mode DMA transfer realize the game.)

FPGA编写环境，具有仿真容易，软件内存小的特点(FPGA authoring environment, with easy simulation software features small memory)

基于BOOTH的32位快速乘法器的设计源码-BOOTH-based 32-bit fast multiplier design source