Viterbi译码器的编解码器的设计 用Verilog实现

自动打铃系统 附带时钟 定时打铃 整点打铃-Auto-play Ling System

uart_tr 异步串口通信主机 使用verilog HDL语言编写(uart_tr the host of the uart )

Ethernet MAC-MII interface of Transmit

CCD图像的颜色插值算法研究及其FPGA实现方法(Color CCD image interpolation algorithm and its FPGA implementation)

使用spi模式初始化w5100，实现了快速以太网的初步建立(Using the spi mode initialization w5100, to achieve the initial establishment of a Fast Ethernet)

一个基于FPGA的数字跑表系统的设计，最小单位是百分表位。采用十进制进位。-FPGA-based digital stopwatch system design, the smallest unit is a digital dial indicator. Binary using the metric system.

本程序实现数字钟系统，有整点报时功能，可显示切换年月日，定时功能(Digital clock system of this program, with the whole point timekeeping function, can display the date, the timing function)

msttr是用vhdl语言开发的一个交通灯程序-msttr VHDL language is a development of the traffic lights procedures

VHDL Checkers Implementation by Ibrahim Elbouchikhi Amir Nader-Tehrani - VHDL Checkers Implementation by Ibrahim Elbouchikhi Amir Nader-Tehrani

Designing Digital Down Conversion Systems with Altera CIC MegaCore and FIR Compensation Filter v6.1