Viterbi译码器的编解码器的设计 用Verilog实现

详细介绍modelsim的使用方法，详细的介绍modelsim使用方法-Details on the use of ModelSim, ModelSim detail using the method

代码为ahb interface ，用verilog编写的,包括仿真和综合。(Code for the interface AHB, written in Verilog, including simulation and synthesis.)

用verilog语言实现了tlk2711serdes芯片的高速串行功能，包含工程与仿真文件，亲测可用(Using Verilog language to achieve a high-speed serial tlk2711serdes chip function, including the project and the simulation file, pro test available)

saa7113_配置.SAA7113视频解码系列芯片的一种，8位彩色配置(saa7113_ configuration. SAA7113 video decoder chips in an 8-bit color configuration)

用于编码器计数，速度能够达到5ms/1圈，速度很快，而且杂波也很好，能够准确应用。已应用在工程中很多年

verilog实现的基带信号编码，整个系统分为六个模块，分别为：时钟模块,待发射模块,卷积模块,扩频模块,极性变换和内插模块,成型滤波器(verilog implementation baseband signal coding, the entire system is divided into six modules, namely: the clock module, to be launched modules, convolution module, spread spectrum modules, polarity transform and interpolation modules, forming filter)

可以给VHDL初学者看的实例，全部经过验证(VHDL beginners can see examples of all the proven)

io 组件，用vhdl实现io端口的控制，包括输入输出，握手信号，-io port VHDL code

dp_xiliux 的 CPLD Verilog设计实验,串口演示.代码测试通过. -dp_xiliux the CPLD Verilog design experiments, serial presentation. code test.

HDMI做为视频输出输入接口已经广泛使用很长时间，主要通过TMDS差分编码传输。本实验通过在HDMI屏幕上显示彩条和输入输出环通实验，来练习视频的时序和视频颜色的表示，为后面视频处理实验做个基础。(HDMI as video output input interface has been widely used for a long time, mainly through TMDS differential coding transmission. In this experiment, by displaying color bars and input/output loop experiments on HDMI screen, video timing sequence and video color representation are practiced to lay a foundation for video processing experiments later)