it performs the serail dividing operations

This application note explains the process of eveloping and debugging a hardware abstraction layer (HAL) software device driver, to aid device driver development for the HAL of the Altera Nios® II system. The various software development stages are illustrated using the Altera_Avalon_UART as an example hardware device, and an example of a HAL software device driver called my_uart.-This application note explains the process of eveloping and debugging a hardware abstraction layer (HAL) software device driver, to aid device driver development for the HAL of the Altera Nios® II system. The various software development stages are illustrated using the Altera_Avalon_UART as an example hardware device, and an example of a HAL software device driver called my_uart.

一些vhdl的简单例子。直接解压，不用密码。-instantiate some simple examples. Direct unpack, without a password.

PLL 锁相环verilog程序 可以直接使用(The PLL can be used directly good use)

DE2 S O P C 用硬件语言 描述地 开发板上测试 CLM模块 实现视频传输-DE2 SOPC LCM

使用FPGA完成AGC 自动增益的代码，适合初学者(FPGA to complete the use of AGC automatic gain code, suitable for beginners)

利用verilog HDL逐点比较法实现直线和圆弧插补(Use verilog HDL by-point comparison method to achieve linear and circular interpolation)

为了便于信号发射，提高信道利用率、发射功率效率以及改善通信质量，人们研制出各种通信信号的调制样式。尽管调制样式多种多样，但实质上调制不外乎用调制信号去控制载波的某一个（或几个）参数，使这个参数按照调制信号的规律而变化。调制信号可以分别“寄生”在已调信号的振幅、频率和相位中，相应的调制就是调幅、调频和调相这三大类熟知的调制方式。 MSK信号就是调频这一大类中的一种相位连续的移频键控。其主要特点是包络恒定，带外辐射小，实现较简单，可用于移动通信中的数字传输 -see up

说明：  SJA1000的ip核和相关测试脚本,OPENCORES 下载(SJA1000 IP downloads from opencores)

这是我上大三时的电子设计题目，叫秒表的功能实现。利用ISE软件进行编程，代码是VHDL语言的，可以实现时（0-9）分（0-59）秒（0-59）即最大10小时的计数，对于不同开发板，可以适当修改代码，使之成为更加广泛的计数器。代码纯原创，请下载。

学习FPGA的资料，基于FPGA的卡尔曼滤波器的设计与实现(Learning FPGA information, FPGA-based Design and Implementation of Kalman Filter)