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State machine used to achieve code lock
用状态机实现密码锁State machine used to achieve code lock-State machine used to achieve code lock
- 2022-10-12 19:25:03下载
- 积分:1
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FPGA SDRAM with the operation of the specific see internal note
用FPGA实现SDRAM的操作,具体操作见内部说明文件-FPGA SDRAM with the operation of the specific see internal note
- 2022-01-22 01:54:54下载
- 积分:1
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用NiosII实现的数字钟,经过本人测试运行正常,开发环境:QuartusII6.0和NiosII IDE6.0...
用NiosII实现的数字钟,经过本人测试运行正常,开发环境:QuartusII6.0和NiosII IDE6.0-NiosII achieved with digital clock, after I run the normal tests, development environment: QuartusII6.0 and NiosII IDE6.0
- 2023-04-12 03:05:04下载
- 积分:1
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VHDL语言,设计一个在DE2平台的8个七段数码管上循环显示HELLO的程序
VHDL语言,设计一个在DE2平台的8个七段数码管上循环显示HELL0的程序,采用按键控制循环的速度,慢速循环时间间隔为1S,快速循环时间间隔为200ms。(VHDL language, design a platform in the DE2 8 segment digital tube display HELL0 program cycle, the speed control loop using keys, slow cycle time interval for the 1S, fast cycle time interval is 200ms.)
- 2020-07-08 20:28:56下载
- 积分:1
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四位抢答器
设计一个可容纳四组参赛的数字式抢答器,每组设一个按钮供抢答使用。抢答器具有第一信号鉴别和锁存功能,使除第一抢答者外的按钮不起作用;设置一个主持人“复位”按钮,主持人复位后,开始抢答,第一答对一次加1分,答错一次减1分
- 2022-03-26 08:47:21下载
- 积分:1
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FIFO design
FIFo参考设计16x32 FIFO with simultaneous read/write operations.-FIFO design-16x32 FIFO with simultaneous read/write operations.
- 2022-03-30 00:49:06下载
- 积分:1
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ISARCSSim_dr
基于CS的一维距离像(HRRP)及FFT成像对比(CS-based HRRP and FFT HRRP)
- 2021-01-13 19:58:49下载
- 积分:1
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LDPC_FPGA
LDPC码的FPGA实现,大家相互学习下。。(the code of LDPC implementation by FPGA)
- 2020-11-29 16:59:28下载
- 积分:1
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LCD1602-TEST
利用verilog驱动LCD1602
本实验是用LCD1602显示英文。(LCD带字库)(//Use verilog driver LCD1602// video tutorial for all of us 21EDA e-learning board// The experiment is LCD1602 display in English. (LCD with font))
- 2013-12-16 13:51:35下载
- 积分:1
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digital_lock_vga_display
Altera DE1平台的数字密码锁设计,可以驱动VGA显示(Altera DE1 platform digital password lock design, can drive VGA display)
- 2017-10-31 10:41:38下载
- 积分:1