-
bit7_Binary_to_BCD_LED
二进制转十进制BCD码 Verilog语言 quartusII(Binary to decimal BCD code Verilog language quartusII)
- 2013-09-14 16:49:39下载
- 积分:1
-
pn sequence generator
本设计是一个伪随机数发生器。此设计;
- 2023-02-23 15:45:04下载
- 积分:1
-
baseband_verilog
verilog实现的基带信号编码,整个系统分为六个模块,分别为:时钟模块,待发射模块,卷积模块,扩频模块,极性变换和内插模块,成型滤波器(verilog implementation baseband signal coding, the entire system is divided into six modules, namely: the clock module, to be launched modules, convolution module, spread spectrum modules, polarity transform and interpolation modules, forming filter)
- 2009-10-08 10:19:34下载
- 积分:1
-
ser_to_parr
很有用的10bit串并转换verilog程序,需要的可以拿去参考下,在quartusII上已验证过(Useful 10bit string and convert verilog program, need to take a reference, has been verified in quartusII)
- 2012-05-21 16:21:22下载
- 积分:1
-
digital_clock
说明: 数字钟通过verilog实现,并且支持Modelsim仿真,通过实验验证(The digital clock is implemented by Verilog and supports Modelsim simulation)
- 2020-06-18 05:00:02下载
- 积分:1
-
xspUSB
说明: 关于usb调试相关测试 代码,用于测试和适配等(usb coding for testing , verigy, for studing usb and fpga)
- 2020-06-22 23:00:01下载
- 积分:1
-
hgfdg
Quartus?
II 相关的语言 详细介绍了VHDL verilog软件开发过程(Quartus ?
II related language detailed introduces the verilog VHDL software development process
)
- 2011-07-31 00:24:42下载
- 积分:1
-
jishuqi
计数器是数字系统中使用最多的时序电路,它不仅能用于对时钟脉冲计数,还可以用于分频、定时、产生节拍脉冲和脉冲序列以及进行数字运算等。(Counter is the most frequently used sequential circuit in digital system. It can be used not only for counting clock pulses, but also for frequency division, timing, generating beat pulses and pulse sequences, and performing digital operations.)
- 2018-11-26 15:42:03下载
- 积分:1
-
usb_test
Cypress USB 的主从FPGA 控制实现代码(USB controller)
- 2012-10-09 10:39:52下载
- 积分:1
-
Sequence Detection VHDL source code, ATERA platform compile. Report detailed des...
序列检测VHDL源代码,ATERA平台编译。详细的报表说明和模拟源代码。
- 2022-10-18 04:30:03下载
- 积分:1