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9_ImageMorphologic
基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,图像形态学部分,腐蚀,膨胀,细化算法(System Generator based image processing engineering, multimedia processing FPGA implementation source code, image morphology section, corrosion, swelling, thinning algorithm)
- 2020-10-23 17:17:22下载
- 积分:1
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循环码的verilog编码程序
(7,4)循环码的verilog编码程序,(7,4)循环码的verilog译码程序((7,4) cyclic code Verilog coding procedures, (7,4) cyclic code the verilog decoding procedure)
- 2020-06-27 02:00:02下载
- 积分:1
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rs_encoder
RS编码器的fpga实现,有TESTBench(RS encoder to achieve the fpga, and TESTBench)
- 2009-06-24 11:37:04下载
- 积分:1
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uvm_use_pipelined_ahb
一个简单的uvm搭建的ahb简单实例,包含了各个组件以及编译的运行的脚本(one sample example about ahb,include every component and compile script)
- 2020-10-21 12:17:24下载
- 积分:1
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uvm_use_pipelined_ahb
一个简单的uvm搭建的ahb简单实例,包含了各个组件以及编译的运行的脚本(one sample example about ahb,include every component and compile script)
- 2020-10-21 12:17:24下载
- 积分:1
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VHDL-DDS
基于FPGA的DDS信号源设计,32位相位累加器,产生可调频率(FPGA-based DDS signal source design, 32-bit phase accumulator to generate tunable frequency)
- 2013-06-27 15:16:15下载
- 积分:1
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biaojue4
此代码实现4人表决功能,4人中有三人同意即为通过。(Four voting)
- 2013-10-29 21:46:07下载
- 积分:1
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VGA控制器的VHDL,得出3条线
vga controller vhdl, it draws 3 lines -vga controller vhdl, it draws 3 lines
- 2022-01-25 16:45:25下载
- 积分:1
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AHB_to_Wishbone_Verilog
说明: 该源代码包是AHB总线到Wishbone总线的交接器,包括以下4个部分:RTL源代码,测试平台,软件测试程序,说明文档。(This source package is the AHB bus to Wishbone bus bridge(wrapper).It has the following 4 parts: RTL codes, testbench, software simulating files, help documents.)
- 2021-01-22 14:48:40下载
- 积分:1
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由于在网上很难下载到EDA技术-窦衡的PPT,所以本人经过学习后做成word,供大家下载。只针对VHDL语言部分和所有的程序。...
由于在网上很难下载到EDA技术-窦衡的PPT,所以本人经过学习后做成word,供大家下载。只针对VHDL语言部分和所有的程序。-Because the Internet is difficult to download to EDA technology- Douheng of the PPT, so I made after learning after the word, for all to download. Only for part of the VHDL language and all the procedures.
- 2023-07-12 15:25:04下载
- 积分:1