DDR SDRAM控制器verilog代码及中文说明文档,对DDR开发很有用的哈。...

IIC总线协议，VHDL语言编写，可以直接使用-IIC bus protocol, VHDL language can be used directly

OFDM中的16QAM星座映射的实现实现详细代码(In OFDM 16QAM constellation mapping to achieve the realization detailed code)

本文研究的IIC总线控制器具有如下特征 1.兼容飞利浦I2C标准，以主机模式与外围设备进行数据通信，对IIC从机模型进行读/读，读/写，写/写，写/读[18]。 2.多主操作 3.软件可编程时钟频率 4.时钟拉伸和等待状态生成 5.软件可编程确认位 6.时钟同步设计 7.仲裁中断丢失，自动转移取消 8.开始/停止/重复启动检测/确认生成 9.总线忙检测(The IIC bus controller studied in this paper has the following characteristics. 1. Compatible with Philips I2C standard, data communication between host mode and peripheral devices, read/read, read/write, write/write, write/read for IIC slave model [18]. 2. Multiple Main Operations 3. Software programmable clock frequency 4. Clock stretching and waiting state generation 5. Software Programmable Confirmation Bit 6. Clock Synchronization Design 7. Loss of arbitration interruption and cancellation of automatic transfer 8. Start/Stop/Repeat Start Detection/Verification Generation 9. Bus busy detection)

Verilog HDL__.rar 简要教程，很有用-Verilog HDL__.rar a brief tutorial, very useful

读取IGS数据中心提供的sinex文件 并恢复法方程(Read sinex file IGS data centers and to restore normal equation)

曼彻斯特编解码，是Verilog语言代码，不多介绍了，用途非常广泛了-Manchester encoding and decoding is the Verilog language code, introduced a few, a very extensive use

使用430的四系点亮流水灯，内置有时钟函数，函数简单，值得一看(The four lines using 430 lit water lights, built-in clock function, the function is simple, eye-catcher)

《Verilog HDL 程序设计教程》5-"Verilog HDL Design Guide" 5

this file describes the steps in building a fifo buffer module in verilog hdl and programming them on an fpga device