write VHDL 8051 kernel, available, convenient, can be downloaded interested in t...

说明：  FPGA 学习实例 动态时钟、面积、速度优化相关代码(Codes related to dynamic clock, area and speed optimization for learning examples of FPGA)

实现FPGA与PC通信的USB2.0接口,采用verilog语言实现(Implementation of FPGA and PC communication USB2.0 interface, using Verilog language to achieve)

这是一些小代码的集合 希望能对大家有所帮助(This is a collection of some small code for all of us hope to be helpful)

ip核的FFTverilog源代码，说明不是很具体-ip nuclear FFTverilog source code, that is not very specific

ALTERA官方板子DE2官方代码，芯片是EP2C35F672C6N(ALTERA official board DE2 official code, the chip is EP2C35F672C6N)

实现dds功能，利用quartus软件， 子模块包括加法器，锁相环，date-rom 利用原图将各模块综合，利用ps2键盘控制频率及相位。-Dds realize functions, using Quartus software, sub-modules including the adder, phase-locked loop, date-rom image to the module using integrated, using ps2 keyboard to control the frequency and phase.

改自特权同学verilog语言写sdram测试程序；支持256M内存(verilog sdram )

四通道DDS信号发生器，很好用的代码，大家一起分享(Four-channel DDS signal generator)

四人抢答器，已通过编译，仿真，包括抢答识别、计分、计时、数字显示等功能。-Four Responder, has passed the compilation, simulation, including the answer in his identification, scoring, timing and digital display.

writing testbench in system verilog