通过VHDL语言的例子，对FPGA的VHDL语言的原型（第七章）是

标准电视信号的同步生成程序，利用VHDL和原理图，利用Quartus综合-Standard television signal to generate the synchronization procedures, the use of VHDL and schematic diagram, using Quartus integrated

利用vhdl 语言实现对ms5611的控制，读取温度值和压力值

利用FPGA来采集美新加速度计的数据，并将FPGA采集到的数据传给ARM系统处理-The use of FPGA to collect the new U.S. accelerometer data and the data collected FPGA passed ARM system processing

A Full adder using half adder unit in vhdl

modelsim设计的可调占空比的方波程式-modelsim designed adjustable duty cycle of the square wave program

verilog HDL经典的入门书籍，内容很详细，讲了许多实例，适合硬件描述语言初学者。(verilog HDL classic introductory book, the content is very detailed, spoke many instances, suitable hardware description language for beginners.)

数字频率计VHDL程序与仿真 文件名：plj.vhd。 --功能：频率计。具有4位显示，能自动根据7位十进制计数的结果，自动选择有效数据的 --高4位进行动态显示。小数点表示是千位，即KHz。 -Digital Cymometer VHDL procedures and simulation of the file name: plj.vhd.- Function: frequency meter. With four shows that will automatically count seven decimal results, automatic selection of effective data- four for the high dynamic display. Decimal point that is 1000, or KHz.

8051内核的Verilog程序实现，完成普通的单片机8051内核功能.包含综合后文件和测试文件(The 8051 kernel Verilog program complete ordinary microcontroller 8051 kernel function. Contains comprehensive post files and test files)

说明：  实现UDP的网络传输，在PC建立UDP的服务器，向fpga的ip：192.168.0.25发送数据，实现回环通讯。(The network transmission of UDP is realized. UDP server is set up in PC, and the data is sent to IP: 192.168.0.25 of FPGA to realize loop communication.)

Quartus ii 入门基础 仅针对初学者 望各位童鞋们指导 呵呵 (Quartus ii entry basis only for beginners looking to guide their children' s shoes Oh you)