利用FPGA实现的脉宽测试技术,基于VHDL,测试误差为时钟周期

本原代码中利用VHDL语言编写了RAM、FIFO、ROM等常用的存储和缓冲部件，完全的代码在ALTERA的FPGA上已经通过仿真测试，保证可用.-primitive code using VHDL prepared RAM, FIFO, ROM, and other commonly used storage and buffer components, complete code in the Altera FPGA simulation test has been passed to ensure that available.

一个具有“百分秒，秒，分”计时功能的数字跑表，可以实现一个小时以内的精确至百分之一秒的计时。 数字跑表的显示读者可以通过编写数码管显示程序来实现，本训练只给出数字跑表的实现过程。 读者还可以通过增加小时的计时功能，实现完整的跑表功能。-A " percentage of seconds, seconds, minutes," digital stopwatch timer can be achieved within an hour of precision to the hundredth of a second time. Digital stopwatch readers can display the digital display through the preparation of procedures to achieve, given the training is only the realization of the process of digital stopwatch. Readers can also function to increase hours of time to achieve full stopwatch function.

本RAR包括《Verilog-HDL实践与应用系统设计》一书中的全部例子，这些例子全部通过了验证。第七章以后的设计实例，不仅有Verilog-HDL的例子，也附了包括VB、VC++等源程序,甚至将DLL的生成方法也详尽地作了说明。(The RAR includes " Verilog-HDL Practice and Application of system design," a book full of examples, all passed validation. Chapter VII of the future design examples, not only examples of Verilog-HDL, but also attached, including VB, VC++ source code, etc., and even DLL generation methods explained in detail.)

有关视频压缩的IPCore，希望对大家有用-Video Compression IPCore

RTL8369开发资料，包括手册，图纸，Layout说明等等(RTL8369 development information, including manuals, drawings, Layout Guide.)

说明：  基于OV7670采集，SDRAM缓存，sobel处理，VGA显示的工程，内有全部代码，基于QUARTUS开发板实现。 FPGA 边缘检测(Based on OV7670 acquisition, SDRAM cache, sobel processing, VGA display project, with all the code, based on QUARTUS development board. FPGA edge detection)

dual port ram control (dual port ram control dual port ram control dual port ram control)

JOP的RAM VHDL源码，经典的经典，不易找到的好东东，-JOP of RAM VHDL source code, classic classics, difficult to find a good price.

试设计一种彩灯控制器控制8盏灯。该彩灯控制器有4种自动切换的花样。第一种花样为彩灯从右到左，然后从左到右逐次点亮，全灭全亮；第二种花样为彩灯两边同时亮一个逐次向中间移动再散开；第三种花样为彩灯两边同时亮两个逐次向中间移动再散开；第四种花样为彩灯两边同时亮三个，然后四亮四灭，四灭四亮，最后一灭一亮。四个花样自动变换，重复以上过程。输入时钟频率为500Hz，灯亮的时间在1―4秒之间，可以自由控制。电路中以“1”代表灯亮，以“0”代表灯灭。-Lantern try to design a controller to control 8 lights. The controller has four kinds of lanterns automatically switch the pattern. The first lantern pattern for right-to-left, and then lit from left to right each time, the whole body light second pattern for a lantern light at the same time on both sides of successive spread to the middle of moving again third pattern for lantern light at the same time on both sides to the middle of two successive re-dispersed mobile fourth pattern for the lantern light at the same time on both sides of the three, then four out four bright, four out four-liang, the last light out. Automatically transform the four patterns, repeat the process above. Input clock frequency of 500Hz, the time for lights between 1-4 seconds, they can con

VHDL_COUNTING 与 4 使脉冲和使用 3 按钮了，下来，停止 （Mạch đếm với 4 xung ENA sử dụng 3 nút nhấn lên，xuống và dừng lại）