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数字波形存储器VHDL源码,基于Quartus II开发。
数字波形存储器VHDL源码,基于Quartus II开发。-Digital waveform memory VHDL source code, based on the Quartus II development.
- 2022-01-26 14:31:04下载
- 积分:1
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THU微纳电子系ic设计课程大作业CNN
说明: THU微纳电子系ic设计课程大作业,使用verilog实现CNN加速器,含一层卷积和池化,仿真通过。(a CNN accelerator written in VerilogHDL, including one conv layer and one pooling layer, simulation passed)
- 2020-07-06 20:18:57下载
- 积分:1
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generate-coordinates
使用VHDL编写语言,巧妙的利用计数器和循环输出一个坐标系,由于VHDL出现负数比较麻烦,全部由正数代替,输出一个原点在中心,半径128的256×256的坐标。方便坐标变换以及用此坐标做算法。(Use of VHDL language, clever use of counter and loop outputs a coordinate system, because VHDL negative too much trouble, all replaced by a positive number, the output an origin at the center, radius 128 256 256 coordinates. Convenient coordinate transformation and coordinate to do with this algorithm.)
- 2013-08-28 11:03:46下载
- 积分:1
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updown
VHDL Programmes -2 for dumping on FPGA
- 2014-02-12 00:22:46下载
- 积分:1
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AD9250 204b Verilog源码
说明: AD9250是一款双通道14位ADC,最高采样速率250 MSPS,JESD204B Subclass 0或Subclass 1编码串行数字输出(The ad9250 is a dual channel 14 bit ADC with a maximum sampling rate of 250 MSPs and jesd204b sub class 0 or sub class 1 coded serial digital output)
- 2021-04-14 11:01:55下载
- 积分:1
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VHDL 与数字电路设计程序参考书所有程序 1
VHDL 与数字电路设计程序参考书所有程序 1-VHDL and digital circuit design process all the procedures a reference book
- 2022-05-05 06:43:48下载
- 积分:1
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MCU2FPGA_SPI_TB
本程序使用Verilog语言实现了SPI接口的设计,可以直接烧到FPGA实现与MCU的通信,自带有测试文件。(The program uses the Verilog language design SPI interface, you can burn directly communicate with the FPGA, MCU, comes with a test file.)
- 2021-02-26 10:29:37下载
- 积分:1
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verilog 代码. 经验证成功,可以作为标准单元库,为FPGA设计者使用....
verilog 代码. 经验证成功,可以作为标准单元库,为FPGA设计者使用.-Verilog code. Certified success, as a standard cell library for the use of FPGA designers.
- 2022-08-24 07:12:53下载
- 积分:1
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基于FPGA的17阶FIR滤波器VHDL代码及说明文档
基于FPGA的17阶FIR滤波器VHDL代码及说明文档-fpga fir
- 2023-03-06 09:25:04下载
- 积分:1
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DS18B20
DS18B20温度传感器的基于FPGA的编程通信,使用VHDL语言(DS18B20 temperature sensor based FPGA programming communication with VHDL)
- 2012-07-16 19:10:29下载
- 积分:1