Serial to parallel conversion code

CS5460校准程序，控制器为C8051F310，SPI通信协议，可以作为电表芯片示例(CS5460 calibration procedure, the controller for the C8051F310, SPI communication protocol, as the meter chip sample)

This tutorial explains how the SDRAM chip on ltera’s DE2 Development and Education board can be used with a Nios II system implemented by using the Altera SOPC Builder.

说明：  DA芯片输出控制 SPI协议 只写不读 FPGA用 verilog(DA-chip SPI protocol output control does not read write-only FPGA with verilog)

出租车计价器VHDL程序与仿真 的vhdl源代码-Taximeter VHDL procedures and simulation vhdl source code

verilog编写的32位浮点加法器-32-bit Floating Point Addition Written in Verilog

这是一个在FPGA上实现CRC算法的程序，包含了CRC-8,CRC-12,CRC-16,CRC-CCIT,CRC-32一共五种校验形式。-err

数字信号除了的FPGA实现的Verilog源代码，之前发过一份是VHDL，各有所需吧，需要的看看吧(Digital signal in addition to the realization of the FPGA Verilog source code, send before a is VHDL, each have need it, need to look at it )

basic cpu design in verilog

基于vhdl的按键检测程序。可以有效消除抖动(vhdl key dectect program)

连乘,乘法可以用简单的for循环，我这里用的是移位寄存器来做，而且是用来两个移位寄存器(this is a tool that function is multiplay,it use a special way to do multiplay .it will teach you the how to use labview )