在SOPC Builder的UART IP核接口

FPGA在直流电机调速中的应用,利用fpga进行PID闭环控制(tell us speed control for DC motor by FPGA,use fpga for PID circle control)

利用VHDL实现CPLD（EPM240T100C5）的串口接收程序-Using VHDL realize CPLD (EPM240T100C5) the serial receive procedure

说明：  实现对LCD1602的Verilog HDL编程(the program for LCD1602 based on Verilog HDL)

VHDL的四选一选择器-VHDL four elected a selector

数字钟的VHDL源程序，可以实现校时，校分等功能，并在试验箱上运行成功-The VHDL source code digital clock, you can achieve at school, school grade features, and success in the chamber is running on

长帧同步时钟的产生， 源码程序，实验好用(Long frame synchronization clock generation, source program, easy to use experimental)

来自于NIOSII的那些事，该书详细地介绍了NIOSS的使用过程，非常适合初学者。(From the NIOSII those things, the book are detailed in this paper NIOSS use process, very suitable for beginners. )

由乘法器组成 单边带信号产生的 仿真源代码 msm (Composed of single sideband signal by the multiplier generated simulation source code msm)

用verilog编写在FLEX10K上实现的简易CPU-used in the preparation of Verilog FLEX10K achieve simple CPU

在VHDL结构体中用于描述逻辑功能和电路结构的语句分为顺序语句和并行语句两部分，顺序语句的执行方式十分类似于普通软件语言的程序执行方式，都是按照语句的前后排列方式顺序执行的。(VHDL structure in the body used to describe the logic function and circuit structure of the order of statements and expressions are divided into two parts in parallel statement, modalities for the implementation of the order of statement is very similar to ordinary language software program implementation, are in accordance with the statements before and after the arrangement of the order implementation.)