VGA显示接口的verilog控制程序。VGA显示驱动控制

本人用verilog编写的UDP协议，经测试可用。(I am prepared to use verilog UDP protocol, the test is available.)

在Quartus II 上编程的基于FPGA的LED显示实验(Programming in the Quartus II LED display experiment based on FPGA )

占空比1：1的通用分频模块-1:1 generic-frequency module

tdma参数化模块。可以自动生成2的n次的tdma哥时隙，用户可根据需要自己配置参数(tdma see the number of model lumps. 2 n basis following manner tdma chance possible 以自 dynamic generation, for root needed self-placement see number)

OFDM系统新型CC编解码的verilogHDL设计，与RS编码级联，经测试误码率性能提高(OFDM system verilogHDL new CC codec design, coding and RS cascade, tested BER performance improvement)

802.3an ldpc码编码、译码设计，使用VERILOG hdl语言编写，包括测试代码，(802.3an ldpc code encoding, decoding the design, use of language VERILOG hdl, including test code,)

利用cordic实现三角函数的计算，用vhdl实现-use cordic achieve trigonometry calculations, using achieve vhdl

通过凌阳16位单片机实现复读机的应用的程序。(By Sunplus 16-bit MCU repeater application process.)

一个NiosII可用的LCD12864 IPcore，含例子-A NiosII available LCD12864 IPcore, with examples

Arbiter code for simulation purpose