verilog实现ALU的源代码，并提供了详细的测试平台！

基于avgt开发板的jesd204b源代码，需要安装Quartus软件(Avgt development board based on the jesd204b source code)

简要地说明时序约束的内容，对入门级的朋友相当起到引导的作用(Briefly describes the content of timing constraints on entry-level friends rather play a guiding role)

logic lock 的vhdl源码，altera平台适用。-logic lock the VHDL source code, altera platform.

关于FPGA的一些例程，包括CORDIC数字计算机的设计，RS(204,188)译码器的设计等。(Some routines on FPGA include the design of CORDIC digital computers, the design of RS (204188) decoders, etc.)

VerilogHDL,对初学者很有帮助的,可以一下的!-VerilogHDL, very helpful for beginners, you can look in!

这是一段写pwm的硬件程序，通过不同的占空比控制不同led灯的亮度，这样可以很好地体现vhdl的硬件代码的优点，     

hi this is an verilog codes

用于Altera公司DE2开发板的TV demonstration-Altera Corporation for DE2 development board of the TV demonstration

成为真正的网页制作的高手的话,必须了解并使用DHTML.这里提供了最好的手册和文档.-become truly a master pages, then have to understand and use DHTML. Here to provide the best manuals and documents.

基于vhdl的PWM发生器-VHDL-based PWM generator