CODE_VHDL_AUTO COUNTING 0 TO 9(Đếm từ 0 đến 9 hiển thị 1 led 7 đoạn)

说明：  实现二项混合式步进电机的驱动，和步进电机的细分程序。(The driving of binomial hybrid stepper motor and the subdivision program of stepper motor are realized.)

Join repetitive control, Very convenient to use, Iterative self-organizing data analysis.

verilog 的东西好好用的呢，那是verilog 学习者的必备东西哦(verilog things properly used it, it is an essential learners verilog things oh)

用VHDL语言编写的代码，以供大家学习和交流，方便大家学习！-prepared using VHDL code for all to study and exchange to facilitate learning!

PrimeTime Intro to STA -PrimeTime Intro to STA

自己总结的Altera_LVDS的IP核的设计及仿真分析，已在实际工程中应用到，并且带有源代码和仿真代码，总结的文档，非常有用。(My summary of the Altera_LVDS IP kernel design and simulation analysis, has been applied in practical engineering, and with source code and simulation code, summary of the document, very useful.)

ccd驱动程序,刺程序是tcd1209的驱动程序，能够修改积分时间(ccd driver stabbed program is tcd1209 driver can modify the integration time)

基于DDS的信号源设计（包括三角波、正弦波、方波）(Design of signal source based on DDS)

这是用verilog硬件描述语言编的5分频代码-This is verilog hardware description language code is compiled by five divider

基于NIOS II 的DE1开发板的VGA 控制器VGA控制模块主要控制VGA模块的开始和其运行的状态，需要写一个Avalon 从端口响应CPU的控制信号，继而控制整个模块的运行，-Based on the DE1 of the NIOS II development board VGA controller to control the VGA module VGA main control module and its operation began, and the need to write a response to Avalon from the CPU ports of the control signal, and then control the operation of the entire module,