rc6 加密

这里是apb总线设计代码。这个源程序是基于verilog语言设计的(Here is the APB bus design code. This source program is designed based on Verilog language)

用VHDL语言编写，在MAXPLUS2下调试通过-VHDL language, debug through MAXPLUS2

使用FPGA透过RS232与PC的作沟通，

很有用的10bit串并转换verilog程序，需要的可以拿去参考下，在quartusII上已验证过(Useful 10bit string and convert verilog program, need to take a reference, has been verified in quartusII)

verilog 教程 PPT版本 语法 结构 设计技巧等(Verilog tutorial PPT version)

简单的apb i2s接口，verilog代码，包括rtl实现和testbench(apb i2s interface . coded by Verilog. including rtl and testbench)

正弦波在dspbuilder下产生VHDL源码及其测试激励文件的matlab模型,在modelsim下仿真通过-sine wave in dspbuilder under VHDL source code and test incentives document matl ab model, the simulation under through modelsim

说明：  小波变换的开源代码（Verilog HDL）包括有测试文件，本人看过，挺好。(code of dwt)

Code developed in classroom

I2C控制器的源代码，Verilog HDL语言编写，可以直接调用-I2C controller source code, Verilog HDL language, you can directly call