rc6 加密

BINARY PHASE SHIFT KEYING

Take its complement by applying DeMorgan’s theorem to obtain F in the form of product of complemented products.

基于FPGA的键盘PS第二类编码方式的verilog解码程序。基于FPGA的键盘PS第二类编码方式的verilog解码程序。(FPGA keyboard PS encoding the verilog decoding procedures. FPGA keyboard PS encoding the verilog decoding procedures.)

ModelSim的使用如何操作和使用以及安装如何安装

说明：  用FPGA进行等精度频率和相位差测量的程序，本程序是在EPEC6Q240C8下的程序(Carried out with the FPGA such as the frequency and phase measurement precision of the procedure, this procedure was the procedure under the EPEC6Q240C8)

实现了四bit计数器的功能，使用的是VHDL语言描述(Four-bit counter, using the VHDL language description)

FPGA开发全攻略，工程师创新宝典，由张国斌等书写-FPGA development

BCH3.c,提供m<21以下的所有码长的BCH编解码模块。以供大家参考。谢谢(BCH encoder&decoder GF(2^m) m<21)

verilog实现的数字跑表 精确到10ms-verilog digital stopwatch to achieve accurate to 10ms

介绍VHDL编程的资料，很详细，值得收藏-vhdl