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Examples of VHDL language, including a variety of logic gate structure.
vhdl 语言实例,包括各种逻辑门的构造。-Examples of VHDL language, including a variety of logic gate structure.
- 2022-08-08 14:03:44下载
- 积分:1
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e_BIU
说明: isa MEMORY PLAN eu biu asm
- 2020-06-25 19:20:02下载
- 积分:1
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test_vhdl
vhdl测试程序,用于初雪者熟悉hdl的具体语法应用。比较简单了。(VHDL test procedure for the First Snow hdl who are familiar with the application of specific syntax. A relatively simple.)
- 2009-01-09 18:25:34下载
- 积分:1
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firhalfband
利用matlab提供的firhalfban函数设计阶数为16、通阻带容限为0.0001的半带滤波器。仿真测试滤波前后的信号时域图,回执滤波器的频率响应特性图(Provided firhalfban function using matlab design order of 16, through the 0.0001 stopband wool half-band filter. Simulation test filtered time domain signal before and after, receipt filter frequency response characteristic diagram)
- 2020-07-03 21:40:02下载
- 积分:1
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吠陀乘数
吠陀乘数
- 2022-01-31 06:52:01下载
- 积分:1
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DE2_NIOSII_uCOSII_2012
一个简单的UCOSII操作系统,在DE2上面调试通过(A simple UCOSII operating systems, debugging through the DE2 above)
- 2012-08-20 10:48:08下载
- 积分:1
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wm8731
wm8731的使用,用于音频信号的采集或者产生(wm8731 use for audio signal acquisition or produce)
- 2009-07-20 15:51:33下载
- 积分:1
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I2C端口的FPGA实现,网上较多,但发现不少有问题,这个是在网上代码的基础上修改过,验证可行。...
I2C端口的FPGA实现,网上较多,但发现不少有问题,这个是在网上代码的基础上修改过,验证可行。-I2C port FPGA, online more, but found that many problems This is a code on the Internet on the basis of the revised test feasible.
- 2022-01-26 17:03:01下载
- 积分:1
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FPGASPI
FPGA SPI 主要模块全部涵盖 时序解释 与DSP通信(FPGA SPI Timing interpretation covering all main modules communicate with the DSP)
- 2020-12-09 13:49:20下载
- 积分:1
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shift_registers
Universal Shift Register
- 2009-06-12 17:29:13下载
- 积分:1